How to realize reconfiguration in FPGA?

hi,

I am now implementing a digital wideband channel simulator in FPGA, by the method of filtering Gaussian noise according to the Jakes power spectral density.

I want to change the channel parameters through a common serial interface. However, I don not know how to change the channel parameters realized in FPGA if not to download the file again.

Maybe NIOS can do this.

Could you please give me some suggestions?


air2008

umm reconfigurable architecture can be implemented on to a simple reconfigurable processor such as a vertex pro II combo. this supports partial reconfigurability. There are typically two methods of reconfigurability omje being partial and the other being on-the-fly. Partial reconfigurability is prefered in places where the area of the FPGA is very important.. and on-the-fly is prefered in places where time is an important criteria..time critical applications such as real time applications.. vechile control, engine management systems etc.

Use a bit file to load ur configuration.. there is always a turn around time.. on-the-fly method jes gate the clock to the unit which u want to reconfig and then change the configuration by passin the bit file.. there is a turn around n the confg, this is how it is typically done.

give it a shot and tell me..

with regards,

do u want to change only parameters? Would it possible in your design to store the parameters in registers that can be written?

My idea is that you use e.g. a UART to get access to your FPGA from a PC and write new parameters during runtime.

best regards

Is that bit file u mentioned is the part of the design which has to be configured......How we will know about the size of bit file and how it is created????How can we calculate the turn around time????please reply.............