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Assura errorOnMissingMaster

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MSLayout

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Hi,

I have a large test chip that will not run due to the errorOnMissingMaster. We had a new kit installed and went from TM4_M3 vias to M4_M3.
we replaced all the areas that were found.

I ran everything below and there are no problems, it has to be on the top level. We tried showing only Markers in the layout and explain markers, but nothing
comes up as missing.

Biggest issue is the log file will not say where the problem is so it's a search mission. Does anyone know of a way to find these missing placments?

Thanks.
 

If it's missing for Assura then I'd suppose it's missing
from the layout. Then there ought to be error-layer
polygons a-blinking.

Seems improbable that there is no information given.
Maybe it's elsewhere than the log file, the details.
Have you looked into whatever is coughed up by the
extraction phase? Maybe consider trying the extract
with older Diva decks (which may be more informative)?

Might be that there are Assura options regarding error
verbosity, and the fill forms probably contain info on
where errors / warnings will go.

Could consider making your own "TM4_M3" construct
that contains new-kit features and old-kit name? But
you'd have to be able to put your fingers up the PDK.
 

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