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How to run the BSIM-CMG model (verilog file) on LTSpice?

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Alisano

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I need a model of a vertical transistor (BSIM-CMG) for modeling in LTspice. Unfortunately, the transistor model was in verilog. So I created a .sp file to transfer the model to hspice. However, when running the transistor model, LTSpice writes an error about the unknown variable nmos1. In this case, the import of a file with model nmos1 was made. Below are the screenshots and the source code. (Sorry for the english language. Translation from Russian was carried out through Google translator).
?????? ?????? 2017-08-23 ? 19.57.07.jpgView attachment black_box_nmos.zip
 

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