# how to understand Xilinx CORDIC V6.0 atan input method

1. ## how to understand Xilinx CORDIC V6.0 atan input method

Hi all,
I am confused with giving input to the Xilinx CORDIC IP. My target is to use this IP to calculate atan function of 32 bit wide input and take output as 32 bit wide output. So I set configuration as follow.

When instantiating IP, it is asked me to input 64 bit wide data. So in my test bench I gave input as 64 bit wide input by combining x axis coordinate and y axis coordinate. My input is

x=0.625 => 00101 0000 00000 00000 0000 0000 00000
y=0.5 => 0010 0000 0000 0000 0000 0000 0000 0000

by combining these two,
input = 0010 1000 0000 0000 0000 0000 0000 0000 0010 0000 0000 0000 0000 0000 0000 0000

So my expected output is atan(0.5/0.625) = 0.6747409422 => 000.1 0101 1001 0111 0111 1010 0101 0001

But my output from core is 0001 1100 1010 1100 0111 1100 0101 0111= 0.89605538360774

I am confused with this output and If anyone can point me where I did wrong, it is very kind pf you. Thank You.

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2. ## Re: how to understand Xilinx CORDIC V6.0 atan input method

Did try atan(0.625/0.5) ?

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3. ## Re: how to understand Xilinx CORDIC V6.0 atan input method

nothing to say. Thank you very much.

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By the way, can you explain me this one too?
When I configure IP core input width and output width to 10 bits, why instantiation template asks me to give input as 32 bits? And output data width will be also 16 bits? What is this extra 6 bits for?And why?
Thank you.

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4. ## Re: how to understand Xilinx CORDIC V6.0 atan input method

A Xilinx user should tell. I'm under the impression that you can choose input and output widths in the specified range when instantiating the core.

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