Problem with post-route simulation in Vivado 2017.1 [Problem does exist from version

Dear all,

I am using Vivado 2017.1.targeting a Zynq 7000 clg484 FPGA and I did synthesis and implementation of my design successfully without any warning or error. I would like to perform a post-route timing simulation but I received the following error message

Even, after changing the library to xil_defaultlib for the design files and testbench, the problem still exists, and gives the following error message:

ERROR: [XSIM 43-3225] Cannot find design unit work.ps in library work located at xsim.dir/work.

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We know that the work path does not exist anymore in Vivado, so based on my search in forums, the solution is to change the library to xil_defaultlib ! that does not solve the problem even for the latest version of Vivado 2017.1 !!!

Also, by looking at the design's path :

D:\Xilinx\my_design\my_design.sim\sim_1\impl\timing\xsim.dir

we will see NO work directory or file !!!!! It seems too weird. Do you believe that this problem did not resolved by development team in Vivado even until Vivado 2017.1 version??? If so, the Vivado is NOT able to perform a post-route timing simulation !!!!!! It is a big bug there though !!!

Kind replied and helps are mostly appreciated !

Thanks and Regards,

Even, after changing the library to xil_defaultlib for the design files and testbench, the problem still exists, and gives the following error message:

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Are you sure you are compiling everything under xil_defaultlib?

Try to create a new project, add the design file one by one, compile all of them into xil_defaultlib. See if it solves.

I don't get it. A post route timing simulation should have only three files...a primitive level netlist, a corresponding SDF, and a testbench file. The only library required on the xelab line would be something like -L simprims_ver or simprims

I would personally run the simulation using the command line for a post route netlist timing simulation. xvlog/xvhdl the netlist, and xelab with the simprims library with/without -debug ?, and xsim with the sdf annotation.

You may also want to add the "work" library to the xelab command line.

ads-ee said:

I don't get it. A post route timing simulation should have only three files...a primitive level netlist, a corresponding SDF, and a testbench file. The only library required on the xelab line would be something like -L simprims_ver or simprims

I would personally run the simulation using the command line for a post route netlist timing simulation. xvlog/xvhdl the netlist, and xelab with the simprims library with/without -debug ?, and xsim with the sdf annotation.

You may also want to add the "work" library to the xelab command line.

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Dear ads-ee,

Thanks for your clarification. Here is a copy of my desig targeting a zinq 7000 FPGA with a ring oscillator design. CAn you please have a look on that to see whether you receive that error message or not?

Thanks and Regards,

put these files in the same directory with the following batch file (if you are using linux you'll have to translate to a bash or whatever script)

tb_ringOscillator.vhd
tb_ringOscillator_time_impl.sdf
tb_ringOscillator_time_impl.v


This will run perfectly fine, the Vivado tools don't seem to know how to setup a proper timing simulation. After every one of the -pulse_xxx stuff their xelab command had a ps after it. that is why the simulation would not run as it was looking for a module named ps.

IMO it's always better to write your own script, I only use the GUI once to generate the prj files (tell the simulation to only generate scripts) that contain all the files to compile to run the sim. Once I have that I never open the GUI project to run sims.

View attachment ring_osc_sim.zip

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Lucky for you I was waiting for a long compile to finish

ads-ee said:

put these files in the same directory with the following batch file (if you are using linux you'll have to translate to a bash or whatever script)

tb_ringOscillator.vhd
tb_ringOscillator_time_impl.sdf
tb_ringOscillator_time_impl.v

Code:

set xv_path=F:\\Xilinx\\Vivado\\2016.2\\bin
call %xv_path%/xvlog  -m64 --relax tb_ringOscillator_time_impl.v
call %xv_path%/xvhdl  -m64 tb_ringOscillator.vhd
call %xv_path%/xelab  -m64 --debug typical --relax --mt 2 --maxdelay -timescale 1ps/1ps -L xil_defaultlib -L simprims_ver -L secureip --snapshot tb_ringOscillator_time_impl -transport_int_delays -pulse_r 15 -pulse_int_r 10 -pulse_e 15 -pulse_int_e 10 tb_ringOscillator glbl 
call %xv_path%/xsim -gui tb_ringOscillator_time_impl

This will run perfectly fine, the Vivado tools don't seem to know how to setup a proper timing simulation. After every one of the -pulse_xxx stuff their xelab command had a ps after it. that is why the simulation would not run as it was looking for a module named ps.

IMO it's always better to write your own script, I only use the GUI once to generate the prj files (tell the simulation to only generate scripts) that contain all the files to compile to run the sim. Once I have that I never open the GUI project to run sims.

View attachment 139128

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Lucky for you I was waiting for a long compile to finish

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dear ads-ee,

Thanks for your effort. Indeed, I have done what you have suggested. I running Vivado 2017 on Windows 7 not Linux and I do not know whether the batch file that you have mentioned is still valid here or not?! I did not understand what did you mean by batch file?!

As you see in the the attached figure, in the path of

D:\Xilinx\Ring_Oscillator_Design\RO_my_first_design\RO_my_first_design.srcs\sim_1\new

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I put the three files that you have said. But I still receive the same error message concerning the work.ps !!! and it does not work.

I also did trial to put those three files in the following path:

D:\Xilinx\Ring_Oscillator_Design\RO_my_first_design\RO_my_first_design.sim\sim_1\impl\timing

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but after execution of this Tcl command :

launch_simulation -simset sim_1 -mode post-implementation -type timing

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the tool willl refresh that directory path and will delete tb_ringOscillator.vhd file automatically. That's why the error exists.

Can you please help me to resolve this problem or, please zip the whole functional design and send it to me?

Thank you so much for your kind.

Put all the files in the ring_osc_sim.zip file (in post #5) in one directory, e.g. c:\test, do not open Vivado, instead open a command window (command.exe) and run the settings64 under the install directory of the Vivado version you are using...

something like:
\xilinx\vivado\2017.1\settings64.bat

That will set the correct environment variables to run the batch file sim.bat that is in the zip file.

change directory in the command window to the directory where you unziped the sim.bat file. In that directory type sim <Enter>

The batch file will compile the testbench xvhdl and netlist xvlog, elaborate with the sdf, and finally starts the simulator xsim in GUI mode so you can look at the waveforms.

Like I said before, I never run the simulations using the Vivado project GUI.

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msdarvishi said:

please zip the whole functional design and send it to me?

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Wouldn't help if I did zip up the whole project (which I never ran in the first place!), as it is plainly obvious that Vivado is generating scripts that are incorrect and will never run as produced.

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Actually I should have paid more attention to my script, it already points to the installation of the Vivado tools, though you'll need to change the drive letter to wherever you have Vivado installed and to the correct version installed.

ads-ee said:

Put all the files in the ring_osc_sim.zip file (in post #5) in one directory, e.g. c:\test, do not open Vivado, instead open a command window (command.exe) and run the settings64 under the install directory of the Vivado version you are using...

something like:
\xilinx\vivado\2017.1\settings64.bat

That will set the correct environment variables to run the batch file sim.bat that is in the zip file.

change directory in the command window to the directory where you unziped the sim.bat file. In that directory type sim <Enter>

The batch file will compile the testbench xvhdl and netlist xvlog, elaborate with the sdf, and finally starts the simulator xsim in GUI mode so you can look at the waveforms.

Like I said before, I never run the simulations using the Vivado project GUI.

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Wouldn't help if I did zip up the whole project (which I never ran in the first place!), as it is plainly obvious that Vivado is generating scripts that are incorrect and will never run as produced.

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Actually I should have paid more attention to my script, it already points to the installation of the Vivado tools, though you'll need to change the drive letter to wherever you have Vivado installed and to the correct version installed.

Click to expand...

Dear ads-ee,

BRAVO ! Now it works very nice. Thanks for the hint and procedure and also letting me know that launching the simulator from command windows is always easier an beneficial than working directly with GUI in Vivado.

I also understood that your procedure beloged to the version installed on your machine and I changed them based on what i have installed. Don't worry it works very fine and Thank you so much.

Regards,