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[SOLVED] storage element in verlog-ams/verilog-a

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vaah

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Hi guys,

I have been looking for a storage element to implement using Verilog-a or Verilog-AMS.
Let me put it his way, how do you implement a ROM in Verilog-AMS/a? It should keep the value, right? How does Verilog-AMS do that? I haven't been abele to find a proper code for a storage element in Verilog-AMS.

This is exactly what I want

if (A) X=1;
else X=0;
Store X forever until "A" happens again. So if I dont run enable "A" again, I dont want to "X" changes even say supply power is off. I guess it is like a ROM


Thank you in advance.
 
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If it's a ROM then I'd make a vector that you can index
by the "address", and for convenience it's best to read
from a separate file and in a format that whatever you'd
generate that block of data words from, can digest.

But sounds more like a nonvolatile RAM to me, as described.
So there, just use a variable and take care with the write
condition logic.
 
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    vaah

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If it's a ROM then I'd make a vector that you can index
by the "address", and for convenience it's best to read
from a separate file and in a format that whatever you'd
generate that block of data words from, can digest.

But sounds more like a nonvolatile RAM to me, as described.
So there, just use a variable and take care with the write
condition logic.

Thank you so much for your help.

What I want to do is to save the output (1bit) and use/read it later in another circuit. I thought there should be a store function or sth like that in Verilog-a/AMS!
Yes indeed! It is similar to NVM RAM. But I didn't get your point! Can you please elaborate more on ROM part?
 

I haven't been able to find a solution for this but one way I thought might be useful if someone has the same issue, is


Code Verilog - [expand]
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real fp;
fp = $fopen("./output.txt","w");   //"w" write and "a" append
$fwrite(fp,"VB=%d\n",res);
$fclose(fp);

 
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