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Some advice in accuracy for a frequency counter using a spartan 6 fpga

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Re: Some advices in acurracy for a frequency counter using a spartan 6 fpga

Ah... sorry, you meant just to send data cyclically from the FPGA... with a start header and a end header

and on the PC side i just wait for the headers, then extract the data ( example header_start byte1 byte2 byte3 byte4 header_end)
 

Re: Some advices in acurracy for a frequency counter using a spartan 6 fpga

Ah... sorry, you meant just to send data cyclically from the FPGA... with a start header and a end header

and on the PC side i just wait for the headers, then extract the data ( example header_start byte1 byte2 byte3 byte4 header_end)

Yes, that's probably the simplest way to do it.

- - - Updated - - -

Using FPGA for this project is a bit much.

For example this functionality was built on a PIC18 controller of Bus Pirate:
http://dangerousprototypes.com/docs/Bus_Pirate_menu_options_guide#F_Measure_frequency_on_the_AUX_pin

Bus Pirate v3 itself consists of FTDI USB to serial UART and PIC18 MCU. Bus Pirate v4 is even more minimalistic since it only uses PIC24, I guess they employ Microchip's USB stack for PIC.

There is probably stuff like this implemented on Arduino as well.
 

Re: Some advices in acurracy for a frequency counter using a spartan 6 fpga

Honestly i am completely new to fpga world... I started out some 5 years ago with PIC's, then i moved to 32bit arm... but to be able to measure HF clocks i think in the industry FPGAs are very well suited, of course it can perform much more tasks...

At a point i was wondering if i should go for a cpld or fpga for this design eventhough my experience in verilog/vhdl is 0 ...

Soooooo i bought a digilent Cmod S6 board just for playing, with this occasion i started learning verilog also. And i begin to find it very simple and logical.... compared to working with arm libraries etc etc
 

Re: Some advices in acurracy for a frequency counter using a spartan 6 fpga

At a point i was wondering if i should go for a cpld or fpga for this design eventhough my experience in verilog/vhdl is 0 ...

Soooooo i bought a digilent Cmod S6 board just for playing, with this occasion i started learning verilog also. And i begin to find it very simple and logical.... compared to working with arm libraries etc etc

Don't fall into the rabbit hole so many other software coders fall into...

Verilog code for synthesis doesn't behave like a software program, there is inherent parallelism involved, so don't start throwing in for loops all over the place, they won't work the way a software coders always think they do. Also learn the difference between blocking (=) and non-blocking (<=) assignments before you start coding. Only use blocking assignments in combonational always blocks, avoid using them ever in a edge sensitive always block. A good rule of thumb is to never mix them in the same always block.

Think in terms of the circuit as a schematic of a digital design with FFs, multiplexers, decoders, etc. If you can break it down mentally as such it's pretty easy to find sites that show you how you should code those basic circuits in Verilog/VHDL. e.g. ASIC world has examples like that.
 

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