1. ## SAR ADC SNDR and other spectral analysis in cadence virtuoso

Hi All,
I am working on 14 bit SAR ADC for biomedical applications with a sampling speed of 5KS/s. The DAC architecture is differential and dynamic range is 1vP-P. My circuit level part is completed and now I am heading towards SNR, SNDR, and other spectral analysis for getting ENOB.

What I know is to do spectral analysis, apply an input signal and take FFT, but don't know which signal to take FFT and get SNR.

I am very much new to this field please do help.

I am attaching a sample image which I am supposed to get after spectral analysis.

[found at www .maximintegrated .com /en/images /appnotes /748 /DI45Fig09 .gif]

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2. ## Re: SAR ADC SNDR and other spectral analysis in cadence virtuoso

Hi,

Afaik:

calculate power of fundamental frequency.
Calculate power of all other frequencies (except DC and fundamental)
Calculate relation to fundamental and get SNDR
***

calculate power of fundamental frequency.
Calculate power of all other frequencies (except DC, fundamental and multiples of fundamental)
Calculate relation to fundamental and get SNR

You could calculate SNR witout input signal.
Then calculate the power of all frequencies (except DC) and refer it to the non existing signal level.
***

But to be sure: There are many sites in the internet that explain it more detailed.

Just do an internet search "ADC SNR ENOB FFT" and find a lot of good informations:4
Like this example: http://www.analog.com/media/en/train...als/MT-003.pdf

Klaus

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3. ## Re: SAR ADC SNDR and other spectral analysis in cadence virtuoso

What I could understand is to apply the input to DAC and plot the output of DAC just after the sampling instant. The applied input and sampled input on the capacitor should be same but due to quantization error, it will add noise hence I need to calculate the SNR at DAC output for my ADC. The spectral analysis will give me information about the extra harmonics.
Please correct me if I am wrong or I misinterpret anything wrong.

Dynamic latch comparator will also contribute some error. How to account for that error? I mean the input to the comparator is input and output are the digital signals. I

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4. ## Re: SAR ADC SNDR and other spectral analysis in cadence virtuoso

Hi,

I´m confused.

Your signal flow is not clear, and the source of signals is unclear, too.

Please post a sketch of your signal current flow. With a brief description of the signals. (analog, digital, bit width, "ideal", "real"...)

Klaus

5. ## Re: SAR ADC SNDR and other spectral analysis in cadence virtuoso

Please find my DUT attached. Here capacitor bank forms DAC which has analog input as VIN+ and VIN- and Vref+ and Vref- are reference signals. SAR block is controlling the comparison. The output of DAC is going to the comparator where I'll get the digital output based on DAC output.

I have attached the output of DAC too.

Now coming back to spectral analysis, I'll apply my input signal at VIN+ and VIN- and for one cycle of sampling, depending on the value of input, I'll get my code generated. Now I am highly confused on which signal I should do spectral analysis.

Specifications are as follows:
1. Resolution = 14 bits
2. Sampling fre = 4KS/s
3. Architecture = differential
4. Input Signal fre = ~100Hz