Xilinx Chip2Chip and Zynq to Kintex Interface using GTP

Dear all,

I'm trying to configure the AXI Chip2Chip core from Xilinx to use a GTP as PHY interface.

Apparently, it requires the use of an Aurora PHY. In the Zynq device I'm using, I have only 4 GTPs available but only one routed the Kintex FPGA I want to interface with.

The only Aurora core available for my Zynq device is the Aurora 8B/10B and configuring the chip2chip to use that PHY requires that I use 2 Aurora Lanes, consuming 2 GTPs and, as I said, I only have available 1...

Does anyone know about a possible solution to interface the chip2chip core with one GTP only?

Thanks and best regards

From what I can see I can configure a aurora 8b10b with a lane width of 2 (or 4) bytes using a single GTP. I also see an option for creating a core with the aurora 64b66b. You might have to be more specific with the part you are using and everything else applicable to the problem.

This is the GT Selections panel of the IP for a xc7z030fbg676-1 (since you didn't specify which part you are using)


As you can see it has a setting of 1 lane for the number of GTs used.

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Okay I see you must be using the BD tool...it is restricting the use of the Aurora to 2 lanes. I'd probably build this not using the BD tool.

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You should probably just send your data directly over aurora using AXI and your own protocol, it looks like it is just the chip2chip bridge that is too restrictive.

Yep, exactly, I'm using the BD tool. And the chip2chip only let me use a minimum of two lanes, what I think means I need two GTPs. The device I'm using is a xc7z015, so I cannot use Aurora 64b66, and the custom board I'm using only have one GTP between the two FPGAs I want to connect.

Apparently I have no other option than to use my own protocol to connect to the Aurora IP.

Thank you!