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Problems with composite video generation!

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PauloConstantino

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Hi friends,

I have finished a circuit that generates composite video and it's almost*** working perfectly. Apart from some ultra weird problem that is occurring when data is displayed. Basically the system sweeps the RAM from address 0 to a certain final address. Each line is 8 pixels in height. Basically it displays 6 lines, and then suddenly it stops displaying, then after a few lines, it starts displaying again.

I have checked the logic of my circuit and everything seems fine. I'm outputting VSYNC for 4 lines. Each line is 0.64us. So VSYNC is 256us long.

Each line has 4.5us HSYNC, and a few microseconds blank. At the end of a line, more blanks are added.

I am using a shift register that is loaded every 8 bits, and then clocked at 8MHz to display the pixels. It seems the shift register is not loading sometimes. Yet my logic for its loading is correct. Has this problem ever occurred with you? Do you have any ideas what this could be? Or any ideas of how I could troubleshoot this? I really don't know what to do anymore. I've checked all connections and they're all fine.

Here's a photo of what the TV is displaying right now. As you can see it goes nutty after 6 lines. It does look like a logic problem, that is, the shift register loading logic is flawed, but I have checked it and rechecked it and it seems correct.


16344386_1830141810531104_1453557505_n.jpg
 

Hi,

We can't verify the informations you give. Therefore it's hard to help.

Please provide some scope pictures that shows the error.
Additionally schematic, code, connections, timing....

Usually one tries to encircle the problem.
In your case you first could change the monitor to verify if the monitor is the probkem or not.
The the cable to the monitor...
Then step by step back... (we don't see which steps apply to your problem)

Klaus
 

A diagnosis is difficult without a schematic but the picture seems to indicate a Vsync problem. It looks like the vertical sync is happening about half way through the lines of characters. The length of Vsync depends on the TV standard your monitor uses but I suspect it either isn't long enough or you have it interlaced wrongly, especially as one line of text is sliced across the gap.

Brian.
 

A diagnosis is difficult without a schematic but the picture seems to indicate a Vsync problem. It looks like the vertical sync is happening about half way through the lines of characters. The length of Vsync depends on the TV standard your monitor uses but I suspect it either isn't long enough or you have it interlaced wrongly, especially as one line of text is sliced across the gap.

Brian.


Actually I'm pretty sure it isn't the VSYNC, I say this because I have tinkered the ram addresses just to see what happens and the screen starts to fill with data. It's only when the addresses into the RAM are correct that there is a blank area on the screen.

If VSYNC was incorrect, the screen would never fill with data all the way. Also I have seen on the scope that all the sync pulses are correct in timing.

I am completely confused. It looks like the addresses into RAM are messed up, but I am following the datasheet to connect them.

- - - Updated - - -

If you have a look a this... The TV is displaying all lines when I connect the shift register lines to a random counter...

This means theres no problem with VSYNC because if VSYNC was happening half way I'd be missing some lines...

**broken link removed**
 

If you have a look a this... The TV is displaying all lines when I connect the shift register lines to a random counter...

This means theres no problem with VSYNC because if VSYNC was happening half way I'd be missing some lines...

16426695_1830490147162937_1437211996_n.jpg
 

I was working on the observation that in your first photograph, the gap is bordered by line(s) that are missing top and bottoms of the characters, that indicates a timing problem on the display side of things rather than the RAM addressing. Maybe vertical blanking is wrong rather than the sync. It's difficult to be sure though, a schematic or even a block diagram would be a great help.

Brian.
 

You really really, really, really need to show us oscilloscope images.

The oscilloscope must be able to trigger on TV signals.

Show a complete field of information.
Show us your vertical syn generator pulses, along with cursors indicating the timing.

- - - Updated - - -

Also, please show the timing of the vertical sync pulses vs the horizontal ones.
 

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