rafimiet
Member level 5
I have an algorithm, that generates some output bits. The number of output bits depend upon the different statistical data provided to it at input. So the number of output bits depend on the input and not on the hardware used. If I want to save the output in a vector or an array, the size of that vector or array has to change according to input. Can we have such type of vector or array in VHDL. It seems to me that such operation if possible will have some serious consequences. Can anybody help in this regard? If it is rot realizable or if it is not a good practice, then how can I proceed.