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comparing numers in vhdl

Code: 
----------------------------------------------------------------------------------
-- Company: 
-- Engineer: 
-- 
-- Create Date:    21:21:54 11/13/2016 
-- Design Name: 
-- Module Name:    t - Behavioral 
-- Project Name: 
-- Target Devices: 
-- Tool versions: 
-- Description: 
--
-- Dependencies: 
--
-- Revision: 
-- Revision 0.01 - File Created
-- Additional Comments: 
--
----------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

---- Uncomment the following library declaration if instantiating
---- any Xilinx primitives in this code.
--library UNISIM;
--use UNISIM.VComponents.all;

entity t is

      port(clk: in std_logic;
		t1 : out integer ;
		t2 : out integer ;
		t3: out integer ;
		 outt : out std_logic_vector (8 downto 0)
		 );
end t;

architecture Behavioral of t is
type memory is array (0 to 9) of STD_LOGIC_VECTOR (8 DOWNTO 0);
signal  dat : memory :=("001001001","001001001","010011001","010011001","011101001","001110001","010001010","001010010","001011010","010100010");


type memory1 is array (0 to 9) of STD_LOGIC_VECTOR (8 DOWNTO 0);
signal  datt : memory1 :=("001001001","000000000","000000000","000000000","000000000","000000000","000000000","000000000","000000000","010100010");


type memory2 is array (0 to 9) of STD_LOGIC_VECTOR (8 DOWNTO 0);
signal  dattt : memory2 :=("000000000","000000000","000000000","000000000","000000000","000000000","000000000","000000000","000000000","000000000");

signal j22 :integer :=0;
signal k22 :integer := 1;
signal m22 :integer := 0;
signal m : STD_LOGIC_VECTOR (8 DOWNTO 0);
signal m1 : integer := 0;
signal p1 : integer := 1;



--signal enterdata : integer := 0;
begin 


process (clk)
begin 
if (rising_edge (clk) ) then 
p1 <= 0;

else 
end if;

end process;





process (p1,j22,k22,m1)
begin
if (p1 = 0) then 
if (m1 =0) then 
if (j22 <10) then 

if (k22 <10) then 


if (dat(j22)(8 downto 0)= dat(k22)(8 downto 0)) then 
dattt (m22 ) <= dat(j22) ;	

m22 <= m22+1;
k22 <= k22+1;


else
k22 <= k22+1;

end if;
else
k22 <= j22+2;
j22 <= j22+1;
end if;
else

k22 <= 1;
j22 <= 0;
m1 <= 2;




end if ;

else 
end if;
else 
end if ;

end process ;


t1 <= m1;
outt <= dattt (1);

end behavioral;


Code: 
----------------------------------------------------------------------------------
-- Company: 
-- Engineer: 
-- 
-- Create Date:    21:21:54 11/13/2016 
-- Design Name: 
-- Module Name:    t - Behavioral 
-- Project Name: 
-- Target Devices: 
-- Tool versions: 
-- Description: 
--
-- Dependencies: 
--
-- Revision: 
-- Revision 0.01 - File Created
-- Additional Comments: 
--
----------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

---- Uncomment the following library declaration if instantiating
---- any Xilinx primitives in this code.
--library UNISIM;
--use UNISIM.VComponents.all;

entity t is

      port(clk: in std_logic;
		t1 : out integer ;
		t2 : out integer ;
		t3: out integer ;
		 outt : out std_logic_vector (8 downto 0)
		 );
end t;

architecture Behavioral of t is
type memory is array (0 to 9) of STD_LOGIC_VECTOR (8 DOWNTO 0);
signal  dat : memory :=("001001001","001001001","010011001","010011001","011101001","001110001","010001010","001010010","001011010","010100010");


type memory1 is array (0 to 9) of STD_LOGIC_VECTOR (8 DOWNTO 0);
signal  datt : memory1 :=("001001001","000000000","000000000","000000000","000000000","000000000","000000000","000000000","000000000","010100010");


type memory2 is array (0 to 9) of STD_LOGIC_VECTOR (8 DOWNTO 0);
signal  dattt : memory2 :=("000000000","000000000","000000000","000000000","000000000","000000000","000000000","000000000","000000000","000000000");

signal j22 :integer :=0;
signal k22 :integer := 1;
signal m22 :integer := 0;
signal m : STD_LOGIC_VECTOR (8 DOWNTO 0);
signal m1 : integer := 0;
type state_type is (p0,p1,p2); 
signal presentstate :state_type;


--signal enterdata : integer := 0;
begin 


process (clk,j22,k22,m1)
begin 
if (rising_edge (clk) ) then 
if (m1 =0) then 
if (j22 <10) then 

if (k22 <10) then 


if (dat(j22)(8 downto 0)= dat(k22)(8 downto 0)) then 
dattt (m22 ) <= dat(j22) ;	

m22 <= m22+1;
k22 <= k22+1;


else
k22 <= k22+1;

end if;
else
k22 <= j22+2;
j22 <= j22+1;
end if;
else

k22 <= 1;
j22 <= 0;
m1 <= 2;




end if ;

else 
end if;
else 
end if ;

end process ;


t1 <= m22;
outt <= dattt (1);

end behavioral;
the first code completes comparison in 2ns as shown in testbench waveform , i mean m1 gets 2 at 2ns ...

here just for simulation i made the clock time period 2ns.. i know 2 ns is never acheived in FPGA.. this is just for checking...


now , if i write the below code it needs much time as it has to wait for rising_edge (clk) for every iteration...as i want the process to go faster so i choose the first one ..........but when i try to synthesize 1st one it is not getting synthesized whereas the 2nd code is getting synthesized ... the error showing while synthesizing 1st code is ..........

ERROR:Cpld:1248 - DRC error: too many Asynchronous Set/Resets (AP/AR) in design.
ERROR:Cpld:1064 - Design rules checking error. Fitting process stopped.
ERROR:Cpld:868 - Cannot fit the design into any of the specified devices with
Click to expand...


i am also getting these warnings .....can i ignore this..
Code: 
WARNING:Xst:819 - "C:/payel1/p1.vhd" line 79: The following signals are missing in the process sensitivity list:
WARNING:Xst:1306 - Output <t2> is never assigned.
WARNING:Xst:1306 - Output <t3> is never assigned.
WARNING:Xst:1780 - Signal <datt> is never used or assigned.
WARNING:Xst:1780 - Signal <m> is never used or assigned.
WARNING:Xst:646 - Signal <dattt<0>> is assigned but never used.
WARNING:Xst:646 - Signal <dattt<2:9>> is assigned but never used.
WARNING:Xst:1781 - Signal <dat> is used but never assigned. Tied to default value.
WARNING:Xst:737 - Found 32-bit latch for signal <m1>.
WARNING:Xst:737 - Found 32-bit latch for signal <j22>.
WARNING:Xst:737 - Found 32-bit latch for signal <k22>.
WARNING:Xst:737 - Found 9-bit latch for signal <dattt_1>.
WARNING:Xst:737 - Found 32-bit latch for signal <m22>.
WARNING:Xst - Property "use_dsp48" is not applicable for this technology.
WARNING:Xst - Property "use_dsp48" is not applicable for this technology.
WARNING:Xst:1293 - FF/Latch  <p1_0> has a constant value of 0 in block <t>.
WARNING:Xst:1710 - FF/Latch  <m1_31> (without init value) has a constant value of 0 in block <t>.
WARNING:Xst:1710 - FF/Latch  <m1_30> (without init value) has a constant value of 0 in block <t>.
WARNING:Xst:1710 - FF/Latch  <m1_29> (without init value) has a constant value of 0 in block <t>.
WARNING:Xst:1710 - FF/Latch  <m1_28> (without init value) has a constant value of 0 in block <t>.
WARNING:Xst:1710 - FF/Latch  <m1_27> (without init value) has a constant value of 0 in block <t>.
WARNING:Xst:1710 - FF/Latch  <m1_26> (without init value) has a constant value of 0 in block <t>.
WARNING:Xst:1710 - FF/Latch  <m1_25> (without init value) has a constant value of 0 in block <t>.
WARNING:Xst:1710 - FF/Latch  <m1_24> (without init value) has a constant value of 0 in block <t>.
WARNING:Xst:1710 - FF/Latch  <m1_23> (without init value) has a constant value of 0 in block <t>.
WARNING:Xst:1710 - FF/Latch  <m1_22> (without init value) has a constant value of 0 in block <t>.
WARNING:Xst:1710 - FF/Latch  <m1_21> (without init value) has a constant value of 0 in block <t>.
WARNING:Xst:1710 - FF/Latch  <m1_20> (without init value) has a constant value of 0 in block <t>.
WARNING:Xst:1710 - FF/Latch  <m1_19> (without init value) has a constant value of 0 in block <t>.
WARNING:Xst:1710 - FF/Latch  <m1_18> (without init value) has a constant value of 0 in block <t>.
WARNING:Xst:1710 - FF/Latch  <m1_17> (without init value) has a constant value of 0 in block <t>.
WARNING:Xst:1710 - FF/Latch  <m1_16> (without init value) has a constant value of 0 in block <t>.
WARNING:Xst:1710 - FF/Latch  <dattt_1_2> (without init value) has a constant value of 0 in block <t>.
WARNING:Xst:1710 - FF/Latch  <dattt_1_8> (without init value) has a constant value of 0 in block <t>.
WARNING:Xst:1710 - FF/Latch  <m1_0> (without init value) has a constant value of 0 in block <t>.
WARNING:Xst:1710 - FF/Latch  <m1_2> (without init value) has a constant value of 0 in block <t>.
WARNING:Xst:1710 - FF/Latch  <m1_3> (without init value) has a constant value of 0 in block <t>.
WARNING:Xst:1710 - FF/Latch  <m1_4> (without init value) has a constant value of 0 in block <t>.
WARNING:Xst:1710 - FF/Latch  <m1_5> (without init value) has a constant value of 0 in block <t>.
WARNING:Xst:1710 - FF/Latch  <m1_6> (without init value) has a constant value of 0 in block <t>.
WARNING:Xst:1710 - FF/Latch  <m1_7> (without init value) has a constant value of 0 in block <t>.
WARNING:Xst:1710 - FF/Latch  <m1_8> (without init value) has a constant value of 0 in block <t>.
WARNING:Xst:1710 - FF/Latch  <m1_9> (without init value) has a constant value of 0 in block <t>.
WARNING:Xst:1710 - FF/Latch  <m1_10> (without init value) has a constant value of 0 in block <t>.
WARNING:Xst:1710 - FF/Latch  <m1_11> (without init value) has a constant value of 0 in block <t>.
WARNING:Xst:1710 - FF/Latch  <m1_12> (without init value) has a constant value of 0 in block <t>.
WARNING:Xst:1710 - FF/Latch  <m1_13> (without init value) has a constant value of 0 in block <t>.
WARNING:Xst:1710 - FF/Latch  <m1_14> (without init value) has a constant value of 0 in block <t>.
WARNING:Xst:1710 - FF/Latch  <m1_15> (without init value) has a constant value of 0 in block <t>.
WARNING:Cpld:1006 - Design 't' has no inputs.
WARNING:Cpld:829 - Signal 'outt<7>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'outt<6>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'outt<5>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'outt<4>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'outt<3>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'outt<1>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<31>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<30>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<29>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<28>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<27>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<26>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<25>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<24>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<23>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<22>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<21>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<20>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<19>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<18>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<17>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<16>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<15>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<14>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<13>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<12>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<11>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<9>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<8>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<1>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<2>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<3>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<4>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<5>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<6>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<7>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<10>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<0>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<31>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<28>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<27>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<26>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<25>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<24>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<23>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<22>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<20>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<19>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<18>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<17>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<16>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<14>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<13>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<12>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<11>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<9>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<10>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<15>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<6>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<5>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<4>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<7>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<8>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<21>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<0>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<1>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<2>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<3>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<29>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<30>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<28>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<27>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<26>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<25>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<24>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<23>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<22>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<21>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<20>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<19>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<18>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<17>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<16>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<15>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<14>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<13>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<12>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<11>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<9>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<8>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<6>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<7>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<4>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<5>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<10>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<29>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<30>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<31>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<0>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<1>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<2>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<3>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 't1<1>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'outt<0>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'outt<7>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'outt<6>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'outt<5>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'outt<4>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'outt<3>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'outt<1>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<31>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<30>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<29>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<28>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<27>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<26>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<25>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<24>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<23>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<22>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<21>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<20>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<19>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<18>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<17>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<16>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<15>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<14>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<13>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<12>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<11>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<9>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<8>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<1>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<2>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<3>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<4>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<5>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<6>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<7>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<10>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<0>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<31>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<28>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<27>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<26>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<25>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<24>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<23>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<22>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<20>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<19>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<18>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<17>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<16>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<14>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<13>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<12>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<11>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<9>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<10>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<15>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<6>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<5>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<4>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<7>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<8>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<21>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<0>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<1>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<2>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<3>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<29>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<30>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<28>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<27>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<26>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<25>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<24>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<23>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<22>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<21>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<20>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<19>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<18>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<17>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<16>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<15>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<14>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<13>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<12>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<11>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<9>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<8>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<6>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<7>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<4>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<5>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<10>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<29>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<30>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<31>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<0>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<1>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<2>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<3>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 't1<1>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'outt<0>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'outt<7>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'outt<6>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'outt<5>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'outt<4>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'outt<3>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'outt<1>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<31>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<30>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<29>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<28>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<27>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<26>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<25>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<24>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<23>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<22>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<21>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<20>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<19>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<18>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<17>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<16>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<15>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<14>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<13>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<12>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<11>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<9>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<8>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<1>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<2>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<3>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<4>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<5>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<6>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<7>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<10>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<0>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<31>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<28>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<27>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<26>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<25>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<24>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<23>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<22>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<20>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<19>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<18>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<17>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<16>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<14>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<13>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<12>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<11>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<9>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<10>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<15>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<6>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<5>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<4>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<7>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<8>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<21>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<0>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<1>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<2>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<3>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<29>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<30>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<28>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<27>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<26>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<25>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<24>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<23>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<22>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<21>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<20>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<19>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<18>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<17>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<16>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<15>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<14>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<13>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<12>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<11>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<9>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<8>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<6>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<7>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<4>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<5>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<10>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<29>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<30>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<31>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<0>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<1>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<2>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<3>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 't1<1>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'outt<0>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'outt<7>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'outt<6>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'outt<5>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'outt<4>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'outt<3>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'outt<1>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<31>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<30>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<29>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<28>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<27>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<26>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<25>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<24>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<23>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<22>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<21>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<20>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<19>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<18>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<17>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<16>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<15>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<14>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<13>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<12>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<11>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<9>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<8>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<1>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<2>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<3>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<4>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<5>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<6>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<7>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<10>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<0>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<31>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<28>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<27>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<26>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<25>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<24>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<23>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<22>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<20>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<19>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<18>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<17>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<16>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<14>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<13>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<12>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<11>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<9>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<10>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<15>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<6>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<5>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<4>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<7>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<8>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<21>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<0>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<1>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<2>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<3>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<29>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<30>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<28>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<27>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<26>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<25>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<24>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<23>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<22>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<21>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<20>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<19>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<18>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<17>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<16>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<15>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<14>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<13>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<12>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<11>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<9>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<8>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<6>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<7>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<4>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<5>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<10>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<29>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<30>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<31>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<0>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<1>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<2>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<3>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 't1<1>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'outt<0>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'outt<7>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'outt<6>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'outt<5>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'outt<4>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'outt<3>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'outt<1>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<31>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<30>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<29>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<28>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<27>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<26>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<25>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<24>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<23>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<22>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<21>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<20>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<19>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<18>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<17>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<16>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<15>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<14>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<13>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<12>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<11>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<9>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<8>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<1>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<2>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<3>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<4>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<5>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<6>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<7>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<10>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'm22<0>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<31>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<28>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<27>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<26>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<25>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<24>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<23>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<22>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<20>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<19>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<18>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<17>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<16>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<14>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<13>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<12>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<11>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<9>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<10>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<15>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<6>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<5>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<4>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<7>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<8>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<21>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<0>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<1>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<2>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<3>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<29>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<30>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<28>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<27>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<26>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<25>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<24>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<23>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<22>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<21>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<20>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<19>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<18>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<17>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<16>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<15>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<14>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<13>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<12>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<11>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<9>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<8>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<6>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<7>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<4>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<5>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<10>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<29>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<30>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'k22<31>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<0>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<1>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<2>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'j22<3>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 't1<1>_MC.CLKF' has been minimized to 'GND'.
WARNING:Cpld:829 - Signal 'outt<0>_MC.CLKF' has been minimized to 'GND'.

here the main aim of the code is to compare all the data of dat memory and to store the equal valued data in dattt....
 
Last edited by a moderator:

Re: comparing numers in vhdl

What's the problem? The errors are quite clear. Too many asynchronous resets. Did you draw the circuit before you wrote the code?
 

Re: comparing numers in vhdl

You either need to move to a more HW centric design, or a more SW centric design.

For example, the design should either have inputs or the outputs should be precomputed using a function to assign to a constant.

I'm not sure where the async set/reset come in specifically.
 

Re: comparing numers in vhdl

There are many details that make the first code non-synthesizable. It's e.g. not possible to implement counters in an asynchronous process. They can work in simulation because process elaboration is only triggered when an event in the sensitivity lists occurs. But sensitivity list are meaningless in hardware synthesis.
 

Re: comparing numers in vhdl

FvM said:
There are many details that make the first code non-synthesizable. It's e.g. not possible to implement counters in an asynchronous process. They can work in simulation because process elaboration is only triggered when an event in the sensitivity lists occurs. But sensitivity list are meaningless in hardware synthesis.
Click to expand...


that means i need clock.will you plz help me in getting a fastest algorithm to compare data in a memory .. space complexity should not be high , as i need to implement it......i searched in net but found only sorting algorithms,like quick sort , Bitonic Sort,batcher sort,green sort,heap sort etc ... bt i need to find the equal valued data stored in a memory.. i need to complete this task in 100 ns with atleast 100 data ...





oh, that means i need clock... but it is consuming too much time ... can you please help me in getting a fastest algorithm that checks all the numbe
 

Re: comparing numers in vhdl

What are you trying to do? "checks all the numbers" doesn't help much. I was trying to guess what your code was intending to do, but I couldn't find a useful interpretation. for example, "datt" is never used. m22 should overflow and you should have a simulation error because you allow the j22 = k22 cases.
 

Re: comparing numers in vhdl

help me in getting a fastest algorithm to compare data in a memory[/QUOTE
i need to complete this task in 100 ns with at least 100 data ...
Click to expand...
If "memory" means RAM it's hardly possible because you can only access one memory location per clock cycle. If memory means logic registers or distributed memory, it's easily possible but consumes a lot of logic resources. There are probably solutions in-between, but we need to know more about the actual application problem. What's the data source, how's the data presented to the logic? Can pipelining help?
Click to expand...
 

Re: comparing numers in vhdl

Wow, there is only one signal in that entire code that make any sense as to what it is used for: clk
Even the component name, t, gives no clue to what you are trying to implement.

I love the dat, datt, dattt stuff, so I assume if you have 10 outputs you will have datttttttttt as the last output :).

Bravo, impressive obfuscating job!

- - - Updated - - -

Oh, yeah you also seem to never take any advice from anyone who makes suggestions. I still see you using the following stuff.
Code: 
process (clk,j22,k22,m1)
begin 
  if (rising_edge (clk) ) then 
    if (m1 =0) then 
      -- bunch of if statements and assignments
    else 
    end if;
  else 
  end if ;
end process ;
I added the formatting (which you refuse to use) to make this more obvious. else-end if with no assignments what for?

IMO you should stay away from hardware design.
 

Re: comparing numers in vhdl

ads-ee said:
Wow, there is only one signal in that entire code that make any sense as to what it is used for: clk
Even the component name, t, gives no clue to what you are trying to implement.

I love the dat, datt, dattt stuff, so I assume if you have 10 outputs you will have datttttttttt as the last output :).

Bravo, impressive obfuscating job!

- - - Updated - - -

Oh, yeah you also seem to never take any advice from anyone who makes suggestions. I still see you using the following stuff.
Code: 
process (clk,j22,k22,m1)
begin 
  if (rising_edge (clk) ) then 
    if (m1 =0) then 
      -- bunch of if statements and assignments
    else 
    end if;
  else 
  end if ;
end process ;
I added the formatting (which you refuse to use) to make this more obvious. else-end if with no assignments what for?

IMO you should stay away from hardware design.
Click to expand...






thanks for you suggestion , bt unable to get my answer ... datt - dattttttttttt does not create problem for fpga ... may be for you.... anyway come to point ....say i have a memory with 100 locations each containing `1 data so total 100 data each of 30 bit ...... i have stored ... ignore source ... now i want to get the equal valued data from this memory within 100 ns. only positive suggestions are welcome...
 

Re: comparing numers in vhdl

p11 said:
thanks for you suggestion , bt unable to get my answer ... datt - dattttttttttt does not create problem for fpga ... may be for you
Click to expand...
this statement alone shows how clueless and what little industry experience you actually have...maintaining code is almost more important than getting the code working in the first place. Typically code lives on long after the original coder is gone on to other pastures. If you don't understand that then you haven't really done real work. This also means you don't know the definition of obfuscate.

.... anyway come to point ....say i have a memory with 100 locations each containing `1 data so total 100 data each of 30 bit ...... i have stored ... ignore source ... now i want to get the equal valued data from this memory within 100 ns. only positive suggestions are welcome...
Click to expand...
make 50 parallel registers that you check in parallel at a 50 ns clock (20 MHz) and do this twice (2 x50, if you share some logic) or make it entirely parallel and check all 100 registers at the same time. If you can run with say 5 ns clock then you can have 20 registers being checked sequentially each time with 5 parallel sets of these registers being done simultaneously.

If you need to do this sequentially via a RAM memory (i.e. one address at a time) then it is impossible in any FPGA family. There are no 1 GHz FPGA that exist now or in the next few years (probably more).

- - - Updated - - -

addendum
I suppose you could implement this as 5 distributed RAMs of 20x30 that are sequentially accessed at 5 ns for each address.

This will just detect the value (give you the compare output) if you need to do something with that value in the 100 ns then you'll probably need to eat up one or more of your 20 clock cycles, so perhaps using 10 10x30 DistRAM with 10 200 MHZ clock cycles (50 ns) will give you time to pipeline for doing something with the compare results. You can try various combinations of trading off parallel access with sequential access and pipelining the results of the compares to reach an optimal solution for your specific case.
 

Re: comparing numers in vhdl

I'm guessing there could be multiple duplicate values from the example. That would make the problem much more difficult. Especially if the inputs have no useful mathematical properties -- eg, they aren't sorted.

The example code implements a nested for-loop by using initial values and assuming the changes to j22/k22 will re-trigger the process until the termination conditions are met and j22/k22 no longer get updated. m22 doesn't need to be in the sensitivity list as it only changes when k22 changes.

This is something like 4851 comparisons (not counting any used for placing values into the output array), assuming the algorithm is correct. For example, triplicates will be repeated in the output array. I suspect a more sane approach would be to divide the problem into 100ns long sub-tasks that can accept new input every 100ns. Possibly choose a better algorithm as well.
 

Re: comparing numers in vhdl

The example code implements a nested for-loop by using initial values and assuming the changes to j22/k22 will re-trigger the process until the termination conditions are met and j22/k22 no longer get updated. m22 doesn't need to be in the sensitivity list as it only changes when k22 changes.
Click to expand...

The OP wants to implement a hardware design in FPGA, thus I don't understand the relation to sensitivity lists. Sensitivity lists matter only regarding simulation to synthesis mismatch, because they are ignored in synthesis.
 

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