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Microsemi, Microprocessor subsystems

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Morell

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Hi everybody

I want to start a research about "Microsemi Microprocessor subsystems"
and I don't even know where should I look for this title.

- I've looked for it in Microsemi.com But the Microprocessor field was empy.
- I've googled "Microsemi microprocessor subsystems" and "Microprocessor subsystems" and
I didn't find anything useful.

My questions are:

1- Does anybody have any documents about "Microprocessor subsystems" ?
2- Where can I find these documents?
3- I don't know what exactly a "Microprocessor subsystem" is. And I don't know why should we have this in an FPGA
4-What is "Microprocessor subsystem"? Is it a Product? Like "Smartfusion", "ProASIC" or "IGLOO"?
Is it a Method? (for example, Having a CPU and FPGA together is a useful thing?)

What I know:
- What I know is that in many products (for example : Microsemi's products) there are CPUs (usually ARM), DSPs and FPGA together in a single chip.

Please help me
Any suggestion(Links, Documents, Books, comments and ... ) is greatly appreciated.
 

What is "Microprocessor subsystem"?
If you want to know the meaning of a technical term, you'll either read the document where you have found it or ask the guy who told you about it.

I don't think that's it's a clearly defined term. FPGA with inbuilt processor core are designated SoC FPGA in the Microsemi product portfolio and also by other vendors. You might name the processor core a microprocessor subsystem. The term could be also used for a softcore processor.
 
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    Morell

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Thanks alot

So we call the hardcore processor or the software processor a "Microprocessor subsystem", is that right?
 

Microsemi as you have discovered is an IC products vendor
(among other things).

One element they recently acquired is the Actel FPGA product
line. I believe I have seen references to implementing some
microprocessor cores on these platforms.

But I think you may be chasing a marketing ghost and the
lack of success turning up details, may relate to that.

I suggest you try some other reformulations of your idea
and see where investigation takes you. Probably into the
"system-on-chip" (SoC") thicket, to end up overwhelmed
by hoopla and lost in gibberish, but among the chaff there
is plenty to consider and to work on making real.
 
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    Morell

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Like most people I also use some search engine and then filter out what I need!

1- Does anybody have any documents about "Microprocessor subsystems" ?
2- Where can I find these documents?
https://www.microsemi.com/products/fpga-soc/design-resources/design-software/libero-soc#documents

3- I don't know what exactly a "Microprocessor subsystem" is. And I don't know why should we have this in an FPGA
4-What is "Microprocessor subsystem"? Is it a Product? Like "Smartfusion", "ProASIC" or "IGLOO"?
Is it a Method? (for example, Having a CPU and FPGA together is a useful thing?)
By English language definition : A subsystem is a self-contained system within a larger system.
So when you say a Microprocessor subsystem it could mean the microprocessor core. A microprocessor core cannot operate by itself. It needs to be supplied with clock/s, resets, memory, inputs and outputs (in the form of various peripherals) to give the desired functionality.
I don't know in which form, hardmacro or softcore is the uP for Microsemi provided. You have to look into the relevant Microsemi documents to learn more about the Microprocessor subsystem that can be used.
 
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    Morell

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Microsemi, Microcontroller subsystems

Hi guys

I want to have a presentation about microsemi MSS and I don't know where to start.

where can I find answers to the following questions:

1- What is the concept of MSS?
2- What are the advantages and disadvantages of MSS?
3- I want to compare a chip that has MSS with a chip that doesn't have MSS.
4- I want to see some examples (useful works with MSS) of using MSS.

Please comment (any links, App note, advice , suggestion will help)

thanks alot
 

There are different kinds of MSS related to FPGA implementation:
1)soft ip
2)hard ip

Hard IP means that MSS is implemented on silicon in addition to FPGA fabric.
The Hard IP of Microsemi are: ARM-Cortex-M3 (implemented in product SmartFusion 1/2) and ARM7 (was implemented in some Proasic3 product).

Soft IP is a source code that can be implemented in FPGA. So any soft IP can be used with Microsemi FPGA if it can fit in FPGA resources.
Most usual soft IP cores are 8051, Cortex-M1, LEON3 (SPARC from Gaisler)
 

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