Low voltage CMOS circuits

Lo voltage CMOS ciruits

Can anyone tell me the use of low voltage power supply? the motivation for using low VDD in analog circuits especially OTAs? In many research articles I have read that its mentioned low voltage low power circuits. I can understand about low power but why low voltage what advantages we get other then low power consumption?

Re: Lo voltage CMOS ciruits

Lower voltage allows use of fewer batteries, and/or longer use from them.
Also increased miniaturization.
Also less heat production.

- - - Updated - - -

Electrolytic capacitors with lower voltage ratings are smaller and cheaper.

Re: Lo voltage CMOS ciruits

For analog blocks low voltage is "what you do because
you must", not "what you want to do for analog quality".
Ability to integrate trumps ultimate performance. Of
course running off one cell or less, for a very long time
has value in things like hearing aids, low-maintenance
remote devices (IoT) and so on. Nobody wants a +/-15V,
10mA op amp in their Apple Watch. But more to the point
they could not embed it inside their cost-crushed, mondo
volume Far East vanilla CMOS foundry process.

Functional (digital) density drives lithography drives device
working voltage, and your analog functions are just along
for the ride if you go by percentage of content. And then
the cost position and the declining voltage of surrounding
circuitry drags support parts (ADCs, DACs, signal conditioning)
along with it, at some lag.