Difference between Input common mode level & bias voltage for differential amplifier

Difference between Input common mode level & bias voltage for differential amplifier

Hi

If i have designed a common mode differential amplifier using nMOS structure (resistance as load). In this case what is the difference between input common mode level and V_bias for this circuit. What is exactly this common mode level if in i am using V_bias to set its operating point.

Next question is that i want to define CMRR than i will say "CMRR is a measure of how well the differential amplifier rejects the common-mode input voltage in favour of the differential-input voltage." How is it rejecting this common mode input voltage.

I think i understood first question properly then second will be understood automatically.

Re: Difference between Input common mode level & bias voltage for differential amplif

Hi

common mode voltage on differential inputs is dc voltage offset that makes the transistors to get ON and be biased in active region , I think that's the same with your Vbias.

rejecting common mode voltage means that the output voltage should not change depending on common mode voltage variations. greater CMRR means that output voltage is less dependent to common mode voltage variations.

Re: Difference between Input common mode level & bias voltage for differential amplif

hamidmoallemi said:

Hi

common mode voltage on differential inputs is dc voltage offset that makes the transistors to get ON and be biased in active region , I think that's the same with your Vbias.

rejecting common mode voltage means that the output voltage should not change depending on common mode voltage variations. greater CMRR means that output voltage is less dependent to common mode voltage variations.

Click to expand...

thank you for your answer. I am agree with you but common mode voltage can also be sinusoid in given condition. suppose i am adding a noise sinusoidal signal on both the terminals of differential amplifier than Vin,CM = (V1+V2)/2 will be sinusoidal noise.

Re: Difference between Input common mode level & bias voltage for differential amplif

the purpose of differential amplifier is to amplify differential input and attenuate common mode noise.
common mode voltage is needed to bias the circuit and must be DC ,
any other unwanted noise signal on common mode voltage (common mode signal ) will be amplified on output with common mode gain

a good amplifier should have very low common mode gain , actually CMRR is a measure of this quality factor

CMRR = (differential gain)/(common mode gain),

larger CMRR means better amplifier performance ,

Re: Difference between Input common mode level & bias voltage for differential amplif

hamidmoallemi said:

the purpose of differential amplifier is to amplify differential input and attenuate common mode noise.
common mode voltage is needed to bias the circuit and must be DC ,
any other unwanted noise signal on common mode voltage (common mode signal ) will be amplified on output with common mode gain

a good amplifier should have very low common mode gain , actually CMRR is a measure of this quality factor

CMRR = (differential gain)/(common mode gain),

larger CMRR means better amplifier performance ,

Click to expand...

I set that noise condition while taking a default consideration of bias (i.e. Vbias is already applied to keep it into saturation). you can't conclude that Input common mode voltage is always DC value. As in the situation which i have framed input CM voltage is not pure dc value as a sinusoid noise is also attached with it. Here Vin cm = Vbias+sinwt(noise). Rest of the theory you have written is correct.

Re: Difference between Input common mode level & bias voltage for differential amplif

The long-tail pair is the basis of a differential amplifier. Usually the tail resistor is replaced by a current source. This has the effect of stabilizing performance. If it weren't for the current source, then common-mode signals could affect performance due to altering bias levels.