High Current (16A - AC side) switch using TRIAC - Snubber Design - Method

Hi all,

I would like to know if anyone here could help me with the above and point me to the correct method to calculate and design the snubber for the opto-coupler and triac in the following schematic as shown in the official datasheet. I would like to know how they arrive at the conclusion with those values when the load is non decided and is for a generalized application.

dv/dt information given in the data sheets were for temp 25deg celsius which seems so different from the real world operation.

I would like to the know the actual industrial practice of solving this issue.

The snubber is there to help dampen the non-ideal properties of the load and triac or specifically the LC network formed by parasitic L in the circuit and the C in your triac, which, upon triac turn-off, will resonate and potentially cause a significant voltage overshoot and ringing.

While you can look up the C in your triac, it may be difficult to predict ahead of time the parsitics of the rest of the circuit or the load. In practice you can add those components to your layout and fine tune them later based on real world testing.

Also in practice I'd turn to the simulator to experiment with values for load L (based on whatever guesses you can make about your system) and RC values.

You should be able to find some general resources on snubbers but basically you decide how large a cap you want to have (based first on the rough amount of energy stored in your L, then second on how good a snubber you need - bigger C will be better but add size/cost) and then tune the R to set RC snubber cutoff frequency near the LC resonant frequency.

Thanks for the info buddy but I still have the doubt about the same.

asdf44 said:

While you can look up the C in your triac, it may be difficult to predict ahead of time the parsitics of the rest of the circuit or the load.
In practice you can add those components to your layout and fine tune them later based on real world testing.
Also in practice I'd turn to the simulator to experiment with values for load L (based on whatever guesses you can make about your system) and RC values.

Click to expand...

If I increase the snubber capacitance then it will reduce the voltage overshoot at triac or optocoupler(separate circuits).
but If I increase the Resistance then the dI/dt will be reduced but increasing the voltage overshoot. Since both are vice versa...I wanted to find an optimum solution to my board since it has to be so space confined as per design requirements.
#I do not have the maths to validate the above info from any of the datasheets or application note.

So as you told if I choose a capacitor value would not that affect my dI/dt performance...How can I make a calculated
trade off between the same.

Following is what the Vishay told me about it...

There are two options to deal with this problem. The first is to use Vishay’s high dV/dt (10000 V/μs) phototriacs, because the high dV/dt will solve the problem.The second is to add a snubber similar to the one included in the circuit shown above.

The basic design process for arriving at the most advantageous snubber possible is as follows:
1. What is the highest tolerable dV/dt that a particular phototriac can withstand?(How to find this because in datasheet all values are at 25 degree celsius)
2. Use dV/dt = V/(Rs x Cs) to come up with an appropriate RC combination

But I did not understand how to find the worse case dv/dt of the Triac or Optocoupler

In the image is a method to find the dv/dt but I did not understand how...Does someone understand how to calculate it from the graph ?

Its rather difficult, because incoming voltage spikes on the mains supply cannot be defined as having any particular maximum dv/dt or maximum amplitude.

The load may either help (if its highly resistive or inductive), or be your worst enemy if its a sparking motor commutator for example.

I suppose the series resistor in the snubber could be sized to limit the peak inrush current through the triac at turn on, at the peak of the cycle to something sensible.
The capacitance then determines how much protection you get from externally applied dv/dt. How much protection you might need could depend on the nature of the load in series with the triac.

Sometimes a strategically placed MOV can be of great assistance, but the whole thing really defies a direct first principles mathematical approach at the design stage.

Its probably more realistic to do some actual testing with a high voltage impulse generator to see what you have, how bad it is, and how to make it better in a practical economic way.

Its a bit like EMC testing. You give it your best shot, then make a practical measurement.

You cannot at the design stage calculate that fitting a certain value capacitor to a particular node will decrease some nasty effect by so many db.

You have to build it and test it, and then fix it empirically any way you can until it reaches some acceptable goal.

Warpspeed said:

Sometimes a strategically placed MOV can be of great assistance, but the whole thing really defies a direct first principles mathematical approach at the design stage.

Its probably more realistic to do some actual testing with a high voltage impulse generator to see what you have, how bad it is, and how to make it better in a practical economic way.

Its a bit like EMC testing. You give it your best shot, then make a practical measurement.

You cannot at the design stage calculate that fitting a certain value capacitor to a particular node will decrease some nasty effect by so many db.

You have to build it and test it, and then fix it empirically any way you can until it reaches some acceptable goal.

Click to expand...

Thanks so much for the information. It was very helpful.Is it industrial practice to follow this method you have mentioned or is there other ways to do it. If I have to test it empirically..what should be my acceptable goals should be if the load is not defined and the triac I am making my design around is a ST electronics T1610.

I am now retired and have been well out of it for many years. There never used to be defined conducted immunity limits, but there could be these days. I really do not know. There are certainly conducted emission limits for phase control.

It really depends on the application how critical false triggering is. If the load is a heating element for example, occasional false triggering probably is of no great concern. For something like a filament lamp load, random occasional flickering could be quite annoying.

The only advice I can offer is to see what similar products are using in the way of a snubber. Usually over time successful commercial designs are copied, and there becomes a generally accepted way of doing things learned through experience. If your business competitors all fit snubbers, its probably for a reason and may be worth starting out with something similar.

Sorry I cannot be of more help.
The question does not really have a specific short answer.