Checking design rule with Calibre

marjang said:

Hi everyone,
Is anyone familiar with these design rule {ESD.28g , OD.R.1 , DRM.R.1 } which my design has not passed them? Can anyone help me to fix them? Are they major problems or the could be waived?


ESD.28g { @ESD implant is required for High Voltage Tolerant I/O designed by 3.3V NMOS device for 5V signal input or 2.5V NMOS device for 3.3V signal input at I/O pad. .....}

OD.R.1 { @{OD or DOD} local density over window 500 * 500 um stepping OD_R_Sum >= 0.2 ....}

DRM.R.1 { @DRM.R.1 is a warning message to remind the users to check the related DRMs. Please refer to DRM.R.1 in the DRM for details}

I appreciate any help in advance.

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ThisIsNotSam said:

this is TSMC, correct?

some ESD rules can be fixed by putting voltage markers, some are expected and can be waived. your IP should have a list of rules that it "violates"
The OD rule can be a recommendation only and might not be enforced, I am not sure. Being a density rule, it is likely you forgot to run some fill script.
The last one is meaningless.

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marjang said:

Thanks for your response.
Actually when I submitted my design to Mosis I received a message that OD layer density is below 25% which is required by tsmc 180. It was 15% before inserting filler cells. Now it is 22% after inserting filler cells! it is still below the threshold. Can this warning in Calibre OD.R.1 be related to OD layer density?
One interesting thing is that Hercules does not show any errors after checking design rule file, do you think would that be enough to trust Hercules?
About the ESD warning, all the I/O cells have this problem! Flat count which is shown in Calibre is equal to the number of I/Os! I didnt understand what you mean by putting voltage markers? Would you please explain it a little more.
Thanks in advance.

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