what is the difference between interface specification and bus specification ??

Hi all,

I came across a AVNET technical seminar where the author describing about the AXI4 overview and its benefits. what is difference between a interface specification and bus specification.

At one point, he clearly says, PLBv46 is a bus specification while axi is a interface spec.

I know very little about SoC's and it's on-chip bus protocols. hope , i can understand all ur answers.

Thanks,

I don't knowe the specifics of AVNET but in general, a bus is reference to the connections within a system and an interface to a reference to connections outside it. A bus would normally share common atributes with all modules or circuits attached to it while an interface would have to conform to a standard shared with other equipment.

Brian.

In this context, it refers to how fanout is done. In a bus system, the master (typically) has an address output, a read/write output, and a write data output. These go to all modules in the design. Then the other modules have read data outputs that go to a mux and then to the master.

This is a simplified system. The disadvantages are that there is a large fanout on address/write/cmd lines. This limits the rate the bus can operate at. There are methods that can be used to reduce the impact.


In contrast, AXI doesn't do this. The master talkes to some form of arbiter. The arbiter then talks to each module. In this manner, address/cmd/data only connects to one other module.

betwixt said:

I don't knowe the specifics of AVNET but in general, a bus is reference to the connections within a system and an interface to a reference to connections outside it. A bus would normally share common atributes with all modules or circuits attached to it while an interface would have to conform to a standard shared with other equipment.

Brian.

Click to expand...

FYI, AVNET is a Avnet the electronics distributor it's not a bus/interface specification.

I see this terminology to mean that a bus is a collection of various master and slave devices that are interconnected that share a common interface specification. The bus specification then defines how those master/slave devices interact and how they should be connected to form a bus (voltage levels, frequency, etc).

In this case AXI only defines the protocol for master/slave devices and doesn't define how they should be interconnected and what the technology is used for the signalling, so it's not a bus specification. But I also believe the Avnet trainer was wrong to say the PLBv46 is a bus specification it is also a interface specification: https://www.xilinx.com/support/documentation/sw_manuals/edk10_sp026.pdf

Things like VMEbus or PCI bus are bus specifications as they define both the protocol, topology, and the physical signaling.