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    DDR3 routing high speed signals

    i am new to this PCb design field, I have few doubts as i started working on High speed designs,

    1. Routing DDR3 signals on top layer instead of inner layer which one is preferred, in my design it is on top and bottom layer. what is the advantage?
    2. Address and clock on separated layer, data on other layer what i can do if there is no space to route data signal separately.how i can proceed?
    3. Spacing for each signal is 1x, 3x for Diff. pairs but how to follow the rules if i do not have enough room for it

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    Re: DDR3 routing high speed signals

    You can find a lot of info on how to route DDR3 memory lanes. Try google!


    By the way, if you are new to the pcb design field, do you think it is a good idea to start with DDR3 layout?????



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    Re: DDR3 routing high speed signals

    By the way, if you are new to the pcb design field, do you think it is a good idea to start with DDR3 layout?????
    Pun intended?

    Not at all! A DDR routing is very complex.
    Someone new to PCB design should start with simpler stuff.



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  4. #4
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    Re: DDR3 routing high speed signals

    The micron site has plenty of guidelines....
    https://www.micron.com/products/dram/ddr-sdram

    Do you understand controlled impedance?
    Do you understand length matching (skew control)?



  5. #5
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    Re: DDR3 routing high speed signals

    Or take a look at the video's at http://www.siemc.com/?q=online_tutorials



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