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Chipscope is not working correctly

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bjzhangwn

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chipscope waiting for trigger

Now I want to see the internal signal in the fpga under test,so I use the chipscope but The chipscope does'nt work correctly,sometimes it can trigger however the match function I use.and the datas are always 0s,sometimes it can't trigger however the match function I use,and it displays waiting for trigger.I did'nt know why,then I see my pcb,and the M2,M1,M0 si the selectmap mode 110, I didn't know if this was the cause,but the bit file can be download to the fpga correctly through Jtag.
 

chipscope problem

JTAG mode can be used no matter the M2~M0 setting.

rgds,
zcq
 

chipscope problem

But I didn't get the result I want?The analyzer sometimes samples the all 0s no matter the trigger condition set,sometimes didn't trigger no matter how the trigger conditon set, and display waiting for trigger,I use the ISE6.2-03i and the analyzer also is 6.2_03i.
 

Re: chipscope problem

If chipscope can be used to read back the output results from the FPGA , what is most frequenctly use to force an input vector to an FPGA ?
 

chipscope problem

JTAG mode can be used on M2~M0.
 

chipscope problem

be careful with your sample_clock used in chipscope.
 

chipscope problem

alright, say,

you choose one clock as your sample clock, right?

Unlike the LAs from Agilent/Tektronics, the sample clock is not high freq clock but a clock from you design, which means that if you use this clock to sample a async signal who has a comparable toggle rate, you might just get an unexplainable waveform.

That's what I mean.
 

chipscope problem

do you have Free Block-ram Because chipscope use Block-ram for memory data

batt
 

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