bandwidth of digital control design in conventional dc-dc converter

hi , I designed conventional single inductor two output dc-dc boost converter in psim. means inductor energy is stored and thrown to 1 output at one cycle and charged and discharged to the 2nd output at next cycle. the two outputs are sensed by using voltage dividers and time multiplexed using analog mux at the speed of half of the switching freq to be process in digital control stage. my digital stage is very simple pid with z transfer func. after than pwm controls the switches on/off time.
the design works well.

vin 2V
vo1 4V
vo2 6V
fs =1M
L=4uH
c=50uF
etc...

so my question is in above scenario, does the bandwidth in the control should be greater than switching frequency or less than switching frequency?
thanks

Hi,

If I see this right, then you gain to use only one inductance instead of two.
But you need three switches instead of two
And the rest is the same.

A drawback is, that the inductance current must be zero before you start the next cycle.

***
To your single question:
The control loop bandwidth needs to be smaller than the switching frequency.
You said: "the design works well" ... so you should know this already.

The max. control loop run frequency is the PWM frequency. So the ADC frequency should be the same as the control loop frequency
If so, then accirding nyquist the bandwidth is limited at half of the sampling frequency.

I'd choose the control loop bandwidth on
* output capacitor
* max load current (both give the max negative slew rateof the output voltage)
* then you need to decide max expected deviation (this gives the reaction time you need)

Klaus

max loop bandwidth should also be well less than the RHPZ fequency, (assuming you are in CCM).