+ Post New Thread
Results 1 to 3 of 3
  1. #1
    Member level 2
    Points: 381, Level: 4

    Join Date
    Oct 2015
    Posts
    52
    Helped
    0 / 0
    Points
    381
    Level
    4

    bandwidth of digital control design in conventional dc-dc converter

    hi , I designed conventional single inductor two output dc-dc boost converter in psim. means inductor energy is stored and thrown to 1 output at one cycle and charged and discharged to the 2nd output at next cycle. the two outputs are sensed by using voltage dividers and time multiplexed using analog mux at the speed of half of the switching freq to be process in digital control stage. my digital stage is very simple pid with z transfer func. after than pwm controls the switches on/off time.
    the design works well.

    vin 2V
    vo1 4V
    vo2 6V
    fs =1M
    L=4uH
    c=50uF
    etc...

    so my question is in above scenario, does the bandwidth in the control should be greater than switching frequency or less than switching frequency?
    thanks
    Click image for larger version. 

Name:	digital dc-dc.png 
Views:	3 
Size:	24.1 KB 
ID:	131527

    •   AltAdvertisment

        
       

  2. #2
    Super Moderator
    Points: 69,564, Level: 64
    Achievements:
    7 years registered
    Awards:
    Most Frequent Poster 3rd Helpful Member

    Join Date
    Apr 2014
    Posts
    14,205
    Helped
    3246 / 3246
    Points
    69,564
    Level
    64

    Re: bandwidth of digital control design in conventional dc-dc converter

    Hi,

    If I see this right, then you gain to use only one inductance instead of two.
    But you need three switches instead of two
    And the rest is the same.

    A drawback is, that the inductance current must be zero before you start the next cycle.

    ***
    To your single question:
    The control loop bandwidth needs to be smaller than the switching frequency.
    You said: "the design works well" ... so you should know this already.

    The max. control loop run frequency is the PWM frequency. So the ADC frequency should be the same as the control loop frequency
    If so, then accirding nyquist the bandwidth is limited at half of the sampling frequency.

    I'd choose the control loop bandwidth on
    * output capacitor
    * max load current (both give the max negative slew rateof the output voltage)
    * then you need to decide max expected deviation (this gives the reaction time you need)

    Klaus


    1 members found this post helpful.

    •   AltAdvertisment

        
       

  3. #3
    Advanced Member level 5
    Points: 31,054, Level: 43
    Achievements:
    7 years registered

    Join Date
    Sep 2008
    Location
    cambridge
    Posts
    6,481
    Helped
    473 / 473
    Points
    31,054
    Level
    43

    Re: bandwidth of digital control design in conventional dc-dc converter

    max loop bandwidth should also be well less than the RHPZ fequency, (assuming you are in CCM).


    1 members found this post helpful.

--[[ ]]--