Vicor SMPS module external error amplifier transfer function?

This concerns the attached schematic of a 48V to 1V5 SMPS which uses Vicor power modules.
Do you agree that the Error Amplifier small signal transfer function should feature a “divide by 24” factor? -And that this must be done so as to take into account the fact that the output voltage is sensed at the 1V5 rail rather than from the intermediate 36V rail. {..and thence the factor of 1/24 due to the “electronics transformer” module (VTM48’) should be accounted for}
(The Power Stage small signal transfer function has been treated by referring the capacitance downstream of the VTM48’ module back to the 36V intermediary rail…and by referring the load resistance likewise.)

Do they have app-notes on this specifically? You say you're referring things back to the perspective of the PRM48 which makes sense but on the other hand the VTM48 is going to have a significant contribution to the overall transfer function. Are you accounting for it? Whether you need an additional factor of 24 depends on how you're choosing to model the entire picture.

But yes, as shown PRM48 errors are reduced by a factor of 24 (by the VTM) before being fed back, so I suspect your model needs to add this into account.

You're so big on LTSpice Treez, why not use that to simulate the bode plots of the control? Their transfer function was very easy to model in LT. If you posted a schematic of that it would be easy to see exactly what you're doing.

You say you're referring things back to the perspective of the PRM48 which makes sense but on the other hand the VTM48 is going to have a significant contribution to the overall transfer function. Are you accounting for it?

Click to expand...

Thanks, this thread (just below here) discusses the VTM48 (Electronic transformer) module, and as far as the power stage small signal transfer fucntion goes, it is just a 24:1 transformer, so that is nice and simple for us to deal with...

https://www.edaboard.com/threads/357531/

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Also thanks, but Its not actually possible to simulate PRM48' in LTspice, as the datasheet doesnt tell enough of its internals.

But yes, as shown PRM48 errors are reduced by a factor of 24 (by the VTM) before being fed back, so I suspect your model needs to add this into account.

Click to expand...

Thanks, i believe i agree with you,

Well DC is going in and DC is coming out so while it may have a transformer internally (or it may be any DC-DC topology operating at a fixed PWM ratio or whatever) it also needs switches and a bunch of other stuff which would contribute delay and thus phase shift to the input/output relationship. Though along the lines of what I said in your other thread its plausible that if your feedback loop is operating in the <50khz territory that the phase shift is negligible and can be ignored. But I'd be searching their documentation for confirmation of that.


I think we disagreed on the applicability of their small signal model....I would take them at their word that it's a good enough model (and again if I recall I think they specified the frequency range for which the model was useful) and I'd have their model along with your entire control loop running AC simulations in LTSpice. It's quite powerful. I'm doing an entirely digital control loop design now but still using LTSpice for the majority of the control development (then translating the S-domain control function into the Z domain in the FPGA).