15V to 5V voltage regulation (without switching voltage supply)

Hi,

i have 15V and i would to have 5V, i dont want to do it with switching power supply because of its noises.
if i do it with voltage regulator; Power Loss = (15V-5V).1A = 10W. Power lost is so much.
Any ideas how can i do it?
thank you

best regards

Hi,

Without switching regulator:
* reduce input voltage
* reduce current consumption
I see no other way.

*****
Noise of switchin regulators:
In a handheld measurement device I have a step down switcher...
50mm away on the same PCB I have a 16 bit ADC running with 10kSamples/s and an anlog bandwidth of about 3kHz.
The input signals is amplified, so that one LSB results in about 2uV.

The noise (in the digital signals) is less than 2uV RMS.

--> Careful design, good layout, adjusted filters ensure this performance.

--> I´d use a switching regulator.
*****

Klaus

Hi. "Power Loss = (15V-5V).1A = 10W" Is that a decimal point or a multiplication sign, please? Does your ADC circuit really need 1 amp, or does it need 100 milliamps? The 7805 type are fine at 1W.

You could use several linear regulators, but I think that is wasteful: 15V supply into a 12V regulator into a 9V regulator into the 5V regulator.

I seem to remember that in another post on this subject Klaus suggested to the person who was making a very similar circuit to yours that the switcher frequency can be matched to the ADC frequency, if I'm not mistaken.

I still think an LDO after the switcher isn't such a bad solution, it seems to be a standard practice. Look for subjects like: "post smps regulation", or "post converter regulation techniques", etc., there should be plenty of information, including application notes.

Hi Klaus,

thank you.
as reducing the input voltage:
- voltage divider with resistor?
- should i use many diodes serie 10x0,7V = 7V voltage reducing.
ir there any other methods?

this 5V will go to ADCs and voltage regulator of FPGA. It will be pcb for IGBT driver.
switching regulator could be fine still?
thank you.

- - - Updated - - -

Hi,
no i guess ADCS(6 ADCs) would need around 100mA maybe less.
it will also go to FPGA(spartan 6). as i remember every bank can consume max 200mA. maybe i am wrong. thats why i thought 1A.

It is easy to reduce noise say on 50mV SMPS ripple using LC filter to desired level combined with PSRR on chip.

CM and DM ferrite beads can also reduce ingress on high impedance inputs, if the layout causes crosstalk.

I have used SMPS for video amplifiers and AMLCD bias without noise effects, but with care.

In this case I stepped down 9V to 5V for Altera Logic and then cascaded a Boost to 12V for Analog low power and LCD bias. Then on 1st design verification, I heard white noise like running water from the PFM boost inductor. Turns out it was an unstable condition called "chaos" which I fixed easily with a low ESR storage cap on the input of the boost regulator.

Hi,

I seem to remember that in another post on this subject Klaus suggested to the person who was making a very similar circuit to yours that the switcher frequency can be matched to the ADC frequency, if I'm not mistaken.

Click to expand...

Yes. Some swtiching controller ICs are synchronizable.

as reducing the input voltage:
- voltage divider with resistor?
- should i use many diodes serie 10x0,7V = 7V voltage reducing.

Click to expand...

No. Use a 9V supply instead of a 12V supply.

this 5V will go to ADCs and voltage regulator of FPGA.

Click to expand...

Sure the Spartan 6 works with 5V?

Klaus

KlausST said:

Hi,





No. Use a 9V supply instead of a 12V supply.


Sure the Spartan 6 works with 5V?

Klaus

Click to expand...

i meant 5v will go to 3.3V voltage regulator.

there is only 15V i can use. i cant change it.

most switching supplys for 3.3V 1A are at least, 50khz, i dont have experience with these, i dont know how would it disturb the circuit.

do you think is it good idea to use SMPS on igbt driver circuit?
greetings