What is nios ii? (Altera DE0)

What is nios ii and why should i use it in altera?
As i understand in nios ii i can write programs in c language but why should i use it if i can write programs in VHDL?

If your applications can be well implemented in HDL, you shouldn't (don't need to) use it.

NIOS is a soft processor core, useful to implement complex sequential algorithms that don't need to run in hardware speed with less FPGA resources.

FvM said:

If your applications can be well implemented in HDL, you shouldn't (don't need to) use it.

NIOS is a soft processor core, useful to implement complex sequential algorithms that don't need to run in hardware speed with less FPGA resources.

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Could you give some examples when we usually use nios ii?

E.g. upper layers of TCP/IP interface, USB interface configuration.

omerysmi said:

Could you give some examples when we usually use nios ii?

Click to expand...

It is particularly usefull when you want to code a program that requires specific built in hardware modules that are not available in off-the-shelf microcontrollers, or even to accelerate funcions already wrote in C laguage but now implementing them more efficiently with the resources available on the FPGA fabric.

omerysmi said:

Could you give some examples when we usually use nios ii?

Click to expand...

When you want to run Linux. That aint going to happen on your VHDL design.

Nios II is the Altera's soft core processor for use in Altera FPGAs. Basically the processor exists as encrypted design which can be compiled and fit into an FPGA like any other digital design design by you are a 3rd party. A microprocessor is after all a digital circuit.

The power of the Nios II comes from the fact that it is highly configurable, like insanely configurable. When generating system using it, you can generate whatever you want e.g a single Nios II processor connected to 10 serial ports and 5 VGA ports for which all data is processed within the single FPGA (FPGAs do have a lot of pins after all). You can connect the Nios II processor to the Altera's, your's or 3rd party IP to create very flexible powerful and robust designs all within a single FPGA.

The Nios II can have a C program running in it and even an operating system with your app running on top of it. At the same time, you can distribute workload to seperate digital blocks within the FPGA design so the Nios II does not have to do everything. It is even possible to hardware accelerate software algorithms. This is actually more awesome that having multithreaded applications. True parallel processing. It is about getting both the flexibility and speed of being able to write C programs together with power of being able to write a design in VHDL for hardware acceleration. They both complement each other don't they? That is they key.

There are downsides, for 1 the Nios II can not run at GHz of frequency since it is all created using the logic resources of the FPGA which have a rather low frequency limit. Depending on the grade of FPGA you get, you might be able to achieve a few 100s of MHz at most but that is only for the high end FPGAs. Really, you need to look at the datasheet ALWAYS to know the theoretical limit that can be reached for that specific FPGA. This downside has now been dealt with. Altera's 5th generation devices called SoC-FPGAs, have a hard dual core ARM processor connected to prorgammable logic fabric within a single FPGA package. The ARM processor can operate at around GHz, though things may have improved in the last 2 years.

FPGAs are about doing things in parallel and getting throughput gains. Many systems however have a processor at the heart which controls peripherals. By having soft-processors like Nios II and hard-processors like the ARM, it is possible to have the whole system or atleast most of it, integrated into a single device. This has a many benefits, faster design, use of fewer design tools, fewer parts, money saved, PCB space saved. Ultimately, it makes an FPGA at the heart of the system replacing microcontrollers or DSPs. It is just one way to make the FPGA market bigger.