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    Need help in implementing verilog code for minmax block of matlab

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    Hi ,
    I am doing a project on SVPWM for three level inverter using FPGA. 90 percentage of the program has been coded and now I am facing a problem with generating the control signals using MINMAX block of MATLAB. Can you help me to code the block in Verilog?
    The input to the block is three phase sine wave .
    Hope you have understood.
    Please help me ...
    The screen shot of the complete block is attached . Please someone help me to implement it in VERILOG

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  2. #2
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    Re: Need help in implementing verilog code for minmax block of matlab

    What part of implementing this in Verilog is the problem (be very specific, if you expect any help)?

    FYI, edaboard members are not FREE consultants, so don't expect someone to write code for you.

    If the problem is you don't know Verilog...
    a) learn Verilog
    b) hire someone that knows Verilog to code this for you (there is a jobs section if you decide to do that).
    c) have a friend that "owes you one" that either knows Verilog, can do a, or has money to give you for b.



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