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Code Verilog - [expand] 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 `include “constants.vams” `include “disciplines.vams” module clk_veriloga(clk); output clk; electrical clk; real clk_var1; real per1,per2; parameter real tt=0.01n; analog begin @(initial_step) begin per1=$abstime+200n; end @(timer(0,per1))begin clk_var1=1; per2=$abstime+12.5n; @(timer(0,per2))begin clk_var1=0; per2=0; end end V(clk) <+ transition(clk_var1,0,tt); end endmodule
`include "constants.vams"
`include "disciplines.vams"
module vclock(PLUS, MINUS);
inout PLUS, MINUS;
electrical PLUS, MINUS;
parameter real delay = 0.0 from [0.0:inf); //Output Waveform Delay Time.
parameter real val0 = 0.0; //Zero Value used in Output Pulse Waveform.
parameter real val1 = 1.0; //One Value used in Output Pulse Waveform.
parameter real period = 100.0u from (0.0:inf); //Period of Input Waveform.
parameter integer ndiv = 1 from [1:inf); //Divide Ratio of Output Frequency.
parameter real rise = (ndiv*period) / 100.0 from (0.0:period);
//Rise Time for Output Pulse Waveform (Time for Transition from 'val0' to 'val1').
parameter real fall = (ndiv*period) / 100.0 from (0.0:period);
//Fall Time for Output Pulse Waveform (Time for Transition from 'val1' to 'val0').
parameter real duty = 0.5 from (0.0:1.0); //Duty Factor for Output Pulse Waveform.
/*
5 edgetype=linear Type of the rising and falling edges.
This is for pulse waveform and pulse-like piecewise linear waveform.
Possible values are linear or halfsine.
*/
integer trigger;
real width; //Output Pulse Width (Duration of 'val1').
real period_1, duty_1, max_step;
analog begin
@(initial_step) begin
if(ndiv == 1) begin
period_1 = period;
duty_1 = duty;
end
else begin
period_1 = ndiv * period;
duty_1 = floor(ndiv/2) / ndiv;
end
$display("%M (Ndiv=%d, Duty_Factor=%.1f)\n", ndiv, duty_1);
max_step = min(rise, fall);
width = duty_1 * (period_1 - (rise + fall));
end //initial_step
$bound_step(max_step);
@( timer(delay, period_1) ) trigger = 1; //Generation of Rise Edge
@( timer(delay+rise+width, period_1) ) trigger = 0; //Generation of Fall Edge
V(PLUS, MINUS) <+ val0 + (val1-val0) * transition(trigger, 0.0, rise, fall);
end //analog
endmodule