Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

how does the ESD protection diodes work

Status
Not open for further replies.

arr_baobao

Full Member level 2
Joined
Nov 1, 2011
Messages
134
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,296
Activity points
2,316
Hi guys,

just saw this ESD protection diode circuit, can anyone explain how does the 2 series ESD protection diodes work to protect the circuit from transient events thanks

1.JPG
 

Hi guys,

just saw this ESD protection diode circuit, can anyone explain how does the 2 series ESD protection diodes work to protect the circuit from transient events thanks

View attachment 129863

The two-diode clamping circuit will not allow voltages exceeding the positive or negative lead to get to protected device input.
What is missing is the signal-source resistance which will define a maximum input current for a voltage exceeding the above indicated limits. For such current the diodes must be specified.
 
  • Like
Reactions: edb_16

    edb_16

    Points: 2
    Helpful Answer Positive Rating
When the input voltage rises to 0.7V higher than Vcc then the top diode becomes forward biased and conducts. Or if the input goes more than -0.7V below (-) or Gnd then the bottom diode becomes forward-biased and conducts. Then the transient is clamped from rising higher if the power supply has a low internal resistance.
 
  • Like
Reactions: edb_16

    edb_16

    Points: 2
    Helpful Answer Positive Rating
When the input voltage rises to 0.7V higher than Vcc then the top diode becomes forward biased and conducts. Or if the input goes more than -0.7V below (-) or Gnd then the bottom diode becomes forward-biased and conducts. Then the transient is clamped from rising higher if the power supply has a low internal resistance.


I understand that when there is a spike or rise in data line higher than Vcc, the top diode conducts and volt flow into the path to protect the downstream IC/circuitry. But how does the voltage flow into another Vcc, which is a probably a power supply. Just dont understand the theory behind this.

thanks.
 

I understand that when there is a spike or rise in data line higher than Vcc, the top diode conducts and volt flow into the path to protect the downstream IC/circuitry. But how does the voltage flow into another Vcc, which is a probably a power supply. Just dont understand the theory behind this.

thanks.

What theory? The input voltage is defined by the output voltage from a signal source having a source impedance say R. Then when the signal voltage exceeds Vcc (plus junction voltage, typically 0.7 V), the R with the diode forward resistance forms a voltage divider. Diode forward resistance is much smaller than R (say 10 Ohms against 100 Ohms), so the input voltage to the device is reduced 9 times when the diode opens.
This is why I wrote first that the signal source impedance R is missing from the circuit.
 
  • Like
Reactions: CataM

    CataM

    Points: 2
    Helpful Answer Positive Rating
I understand your question. A power supply is usually with a series pass transistor that does not clamp when the top diode feeds it a positive transient. But if the power supply is a zener diode then it would clamp the transient.
ICs usually have a supply bypass capacitor so that they do not oscillate or ring. That capacitor would take time to charge and limit a short duration transient.
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top