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    [Moved]: Vdsat in weak inversion - definition

    Reference previous discussion:

    https://www.edaboard.com/thread347253.html
    Excuse me, when I simulation my amp,I find vgs-vth=20mv,vdsat=38mv.gain=40dB
    1.Does this means the mos is in moderate inversion?
    2.vdsat is so small,whether it will have any bad impact on my amp?

    thank you very much!
    Last edited by BradtheRad; 2nd June 2016 at 04:57. Reason: Created new thread - linked to existing thread

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    Re: Vdsat in weak inversion - definition

    Quote Originally Posted by 1091120109 View Post
    1.Does this means the mos is in moderate inversion?
    Yes; moderate or even weak inversion. Depends on the transistor current density Id/W .

    Quote Originally Posted by 1091120109 View Post
    2.vdsat is so small,whether it will have any bad impact on my amp?
    No, in contrary.



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    Re: Vdsat in weak inversion - definition

    Yes; moderate or even weak inversion. Depends on the transistor current density Id/W .
    Could you explain why "weak inversion" here?
    According to this, it should be in moderate inversion.



    Click image for larger version. 

Name:	Inversion.PNG 
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    Re: Vdsat in weak inversion - definition

    Quote Originally Posted by anhnha View Post
    Could you explain why "weak inversion" here?
    According to this, it should be in moderate inversion.
    According to Binkley (s. below), regarding to the very low vdsat=38mV info (above), it could well be in weak inversion mode. Actually, vdsat shouldn't be lower than 4Vt≈100mV (at room temperature).

    Click image for larger version. 

Name:	log-Ids_vs_Vds_with_inversion_regions.png 
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    Re: Vdsat in weak inversion - definition

    Quote Originally Posted by erikl View Post
    According to Binkley (s. below), regarding to the very low vdsat=38mV info (above), it could well be in weak inversion mode. Actually, vdsat shouldn't be lower than 4Vt≈100mV (at room temperature).

    Click image for larger version. 

Name:	log-Ids_vs_Vds_with_inversion_regions.png 
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    What't the disadvantage of Vds< 100mV?



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    Re: Vdsat in weak inversion - definition

    Quote Originally Posted by shanmei View Post
    What't the disadvantage of Vds< 100mV?
    Should you mean VDS,sat, there would be none, but theoretically it doesn't seem possible - at least at room temperature or above. But of course VDS,sat depends on its calculation method, i.e. the boundary condition used for it.

    Don't mix up the drain-source voltage Vds with the saturation voltage VDS,sat ; Vds may of course be lower than 100mV, it can be zero or even negative - depending on its external circuit.


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    Re: Vdsat in weak inversion - definition

    Hi 1091120109

    From what I gather from forum posts and discussions with colleagues, (and as erikl said) there is no harm in operating in weak inversion/subthreshold region (also see: https://www.edaboard.com/thread355783.html)


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    Re: Vdsat in weak inversion - definition

    Quote Originally Posted by anhnha View Post
    Could you explain why "weak inversion" here?
    According to this, it should be in moderate inversion.



    Click image for larger version. 

Name:	Inversion.PNG 
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    Hi anhnha,

    Can you please cite the reference from which you obtained that screenshot?



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    Re: Vdsat in weak inversion - definition

    I will try to find that. I am not sure which book. However, you can see the similar one from post #4 here by erikl.
    According to this, the transistor in original post (Veff = Vgs - Vth =20mV) should be in moderate inversion.



    http://obrazki.elektroda.pl/1105479400_1349284089.png
    https://www.edaboard.com/thread267399.html


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