GarryM
Newbie level 4
(My first post, hello!)
I have a product using a Xilinx CPLD that successfully runs code I wrote in ABEL some years ago. I am trying to port this over to VHDL. One little section of the code is a 14-bit counter. In my VHDL version, it counts successfully up to 12 bits, then goes nuts. It will count from 0x0000 to 0x0FFF three times, then jump to 0x3000, and go from there to 0x3FFF and on to 0x0000. It's as if bit 12 is stuck to bit 13. I suspect that a carry bit is not getting through.
For the record, it looks like this:
The ABEL code contains this little nugget up at the top:
the use of which I don't recall, but I have dim memories of having to experiment with different values to get it to work.
Is there some trick I need to learn to use in making larger counters?
I have a product using a Xilinx CPLD that successfully runs code I wrote in ABEL some years ago. I am trying to port this over to VHDL. One little section of the code is a 14-bit counter. In my VHDL version, it counts successfully up to 12 bits, then goes nuts. It will count from 0x0000 to 0x0FFF three times, then jump to 0x3000, and go from there to 0x3FFF and on to 0x0000. It's as if bit 12 is stuck to bit 13. I suspect that a carry bit is not getting through.
For the record, it looks like this:
Code VHDL - [expand] 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; iClk : in STD_LOGIC; --input clock, constant 50 MHz signal rFlagEv : std_logic; --a decoded bit signal rFrame : std_logic_vector(13 downto 0); --the weird counter -- elsewhere in the code, rFlagEv is set when I want to count the event. It is hi for exactly one clock cycle. framecount : process (iClk) begin if rising_edge(iClk) then if (rFlagEv = '1') then rFrame <= rFrame + 1; else rFrame <= rFrame; end if; end if; end process framecount;
The ABEL code contains this little nugget up at the top:
Code:
@CARRY 0;
Is there some trick I need to learn to use in making larger counters?
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