Could you recommend a SIMULATION-oriented book for VHDL?

I am very new to VHDL and honestly my ride so far with VHDL has been so bumpy.
after trying multiple book I reached a conclusion that it is better for me now to start learning VHDL as a simulation language and put aside the Synthesis part, as Synthesis require a lot of Hardware skills that I am currently not very good at.
I came from software background and absolutely unfamiliar with RTL approach to digital design thus learning the simulation aspects of VHDL seems like the right thing for me at least until I build up the required hardware skills.

And here comes my problem; I have been looking for a good SIMULATION oriented introductory book on VHDL but so far without any success.
It seems like the only book that tackles VHDL from SIMULATION-only point of view is :
The Designer's Guide to VHDL, Third Edition (Systems on Silicon) by Peter J. Ashenden.

It is sure a great book but it just not working out well for me; it seems to me that trying to introduce someone to VHDL using this book is just like introducing someone to Hamburger for the first time by asking him to eat a kilogram of bread and then drinking a whole litter of ketchup and then eating a whole kilogram of minced beef and finally a whole cabbage head and after all of that expecting him to have a good grasp of what hamburger taste like.

sorry for the long explanation but I am just trying to convey the state of frustration I am at right now .
I really hate to give up on VHDL but this attempt is my last hope

Perhaps the hardship you're facing is due to the lack of the skills in electronics. For those who have already some background in combinational and sequential logic, the HDL comes intuitive. You have to remind that VHDL should not be considered as a programming language, but rather a descriptive language. I would recommend you search for tutorials to introduce in that concepts;

Actually when i said that i am lacking electronics skills i was meaning RTL approach to Digital Design.
other than that i am very good at conventional digital design back then during my Computer Engineering Bachelor degree years i scored 94/100 on digital design class.
stuff like combinational, sequential logic including FF's, Registers,memories .. etc are very easy for me.
In fact i haven't encountered any hardware difficulties during reading from the above mentioned book. i am doing almost all the examples without any trouble . but actually the way syntax is presented within the book and the vast density of subjects is what bothers me.
for example i don't believe that a guy having a first read on VHDL need to go through +50 pages on arrays only . that is a lot to digest on a first run.

If you're a software guy and really dont care about synthesis - why did you go for VHDL? you should have Done verilog. It has borrowed its syntax from programming languages. Or even better - why not just stick with schematic entry?

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PS. There are no real books dealing with simulation because the usual end goal for HDL is synthesis.

well iam a software guy who is trying to enter the paradigm of professional hardware
and the reason why i chosed to start with simulation is because it seems a gentler entrance into VHDL from software background.

and when i said a book that focuses on simulation i ent something like :
The Designer's Guide to VHDL, Third Edition (Systems on Silicon) by Peter J. Ashenden.
but one that is written better than this one

Pretty much only testbenches are "software" in VHDL, otherwise you are writing hardware descriptions. So if you need something that teaches you how to use VHDL as software then something along the lines of a book on testbenching with VHDL might be more your cup of tea, e.g. "Writing Testbenches: Functional Verification of HDL Models, by Janick Bergeron is one such book. I have no idea if it is any good, but the reviews on Amazon seem to indicate it's alright.

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BTW running simulations isn't an easy introduction for a software type for learning VHDL, it's specifically for verifying your hardware descriptions functionality.

Ok Ok i got it. So i need to start by learning Synthesisable VHDL NOT simulation VHDL .
so you could you guys refer a nice beginner's book for Synthesisable VHDL.
a book that is suitable for a "traumatised" VHDL beginner ?!
i have a good understanding of digital logic circuits BUT NOT from RTL point of view.

P.S please don't refer any tutorial website i need a real book