Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Synchronous switched extraction circuit design in pspice

Status
Not open for further replies.
J

jainjose

Newbie level 4
Joined
May 27, 2016
Messages
6
Helped
0
Reputation
0
Reaction score
0
Trophy points
1
Activity points
49
Hello,

I want to simulate a synchronous switched extraction circuit in pspice. Here the voltage across the capacitor controls opening and closing of the switch. How can I model switch in pspice.

Thanks in Advance

 

Read the Pspice manual about the built-in switch model.
 

If you don't mind can you please try this circuit once because I tried several times using voltage controlled switch. I don't know where am making the mistake since am not getting the proper waveform with charging and discharging phase.
 

The circuit can surely work, but I don't know any parameter you have chosen. It would be better if you show your results, e.g. simulation waveforms and tell how they differ from your expectations.
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top