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Two transistor forward converters suffer overly high magnetizing current

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treez

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Two Transistor Forward converter suffers overly high magnetiing current.

Hello,
Why does the primary magnetising current of the attached Two Transistor Forward converter build up to 540mA peak at the 15ms point of the attached LTspice simulation?
The FET duty cycle is always less than 0.5. It should not be possible for the primary magnetising current to “staircase” up to this level.
 

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  • Schematic _DCM Two transistor forward.pdf
    21.9 KB · Views: 153
  • DCM Two transistor forward.txt
    11.5 KB · Views: 75

Re: Two Transistor Forward converter suffers overly high magnetiing current.

Can you show the voltage across the primary in the last few cycles before that point?
 

Re: Two Transistor Forward converter suffers overly high magnetiing current.

This relation is not correct: i(L1)+1.47*I(L2); It's i(L1)-1.47*I(L2).
 

Re: Two Transistor Forward converter suffers overly high magnetiing current.

This relation is not correct: i(L1)+1.47*I(L2); It's i(L1)-1.47*I(L2).
..yes but in the simulation you have to use the "i(L1)+1.47*I(L2)", because of the way the simulator assigns polarity to the currents. Try it and see and you will realise. I know what you mean though, I originally thought as you did.

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Can you show the voltage across the primary in the last few cycles before that point?
As yo know, this should not matter, as long as there is as many volt.seconds_off as there was volt.seconds_ON , then it should have reset, and not staircased like it has.
 

Re: Two Transistor Forward converter suffers overly high magnetiing current.

Saturation may apear in transient phases and when for some reasons primary current increase and seconday current don't, so magentizing flux FIm=n1*i1-n2*i2 increase; also maybe primary flux don't reset. Add a diode reversed biased parallel with input power supply.
 

Re: Two Transistor Forward converter suffers overly high magnetiing current.

You mean put the diode across the input cap ?(obviously cathode to positive of bus).
I can see the fault process you speak of but just cant see how that can happen. The controller is always pulsing at less than 50% duty, in every switching period, the rising magnetising current should never be able to go up more than it could come back down.
 

Re: Two Transistor Forward converter suffers overly high magnetiing current.

May happen when secondary solenation is smaller than primary and remanent induction build-up and lead core close to saturation. Need to be sure that core induction is reset after each step (no remanent induction in core).
May you put diagrame with both i1 and i2 currents for first few steps? Check delays and area difference between these currents.
 

Re: Two Transistor Forward converter suffers overly high magnetiing current.

With a very low leakage inductance transformer that also has a very high magnetizing inductance and thus very low open-circuit resonance (Lm & Cwinding + Coss), at turn off the voltage on the windings rises very slowly so you don't get the volt-second reset you think you will get at 50% duty cycle. The core flux will walk when you're close to 50% such as at minimum input voltage, at start-up, or during load step transients. You can see this slowness by looking at Vds at turn off and looking how quickly the voltage rises and is clamped by the diodes. If the Vds never rings back down when you're close to 50% duty you're in trouble.
 

Re: Two Transistor Forward converter suffers overly high magnetiing current.

Your Vin=390V, Vout=400V, and your transformer Ns/Np=1.47. You can't even get your desired output with D<0.5 (assuming simple CCM operation). You shouldn't be surprised at strange results.
 
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Re: Two Transistor Forward converter suffers overly high magnetiing current.

Your Vin=390V, Vout=400V, and your transformer Ns/Np=1.47. You can't even get your desired output with D<0.5 (assuming simple CCM operation). You shouldn't be surprised at strange results.
This is a DCM design, not CCM.
The control chip cannot give more than D=0.5, (in fact its always less than 0.5) so it should not be possible for the magnetising current to staircase, there is always more off time than on time, the current should always "fall right back down"

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if you run the simulation of post#1 then you can see that this setup can manage these conditions.

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Also, as you know, having a high magnetising inductance shouldn’t make the 2 transistor forward converter more prone to “staircasing” of the primary magnetising current as seen in the simulation of the top post
 

Re: Two Transistor Forward converter suffers overly high magnetiing current.

Staircase of magentizing current apear always flux is not reseted to zero in "off phase".
So, even that off time is higer that on time, important is V*s balance (or N*i).
 

Re: Two Transistor Forward converter suffers overly high magnetiing current.

ok thanks all, its more clear whats happening now, the lt124x controller isn't limiting the duty cycle to <0.5 as the datasheet said it would...this must be something to do with the spice model.
 

Re: Two Transistor Forward converter suffers overly high magnetiing current.

In any sim, numeric rounding error, truncation even, can apply non zero average volt seconds to a core and the effect is often a mystifying (to newbies) low freq or monotonic change in the Imag or BH loop position.

It is a mistake to trust sim's or supplied models too far, you could have easily looked at the o/p of the above IC and seen for yourself D go to > 0.5 (if that is the case)
 
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