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NMOS amplifier with PMOS current mirror

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Bhuvnesh

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I'm trying to understand the circuit shown below,
aicd_stack_exchange.png

I understand that the PMOS acts as a current mirror but I am finding it really difficult to make sense of the circuit on how it amplifies the input and why the resistor is present. I tried a lot of articles but I did not find the right explanation for this circuit. Would be great if you guys could share some light on the same.
 

Resistor is there to bias the input device in saturation.
 

I once read that this biasing method is commonly used to reduce temperature-related misbehavior including thermal runaway.

I'm not sure if that applies solely to transistors, or also mosfets.
 

Because of Id, Vout sits at some large-signal DC bias voltage, which is then used to bias the gate of the NFET. This is necessary since the AC coupling at the gate of the NFET will remove DC components and the NFET wouldn't be working properly unless biased at some reasonable VGS (and VDS).

The gate voltage increases (as the gate charges) through the resistor, until equilibrium is reached at some biasing point where ID1 = Id. Of course, this assumes that such a condition is possible with transistors in saturation - if not, you'll be in triode or cut-off.
 

That PMOS is not a current mirror, it is simply configured as a current source.
A current mirror would use two or more PMOS transistors.
 

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