cascode for higher collector voltage?

dick_freebird said:

I would make sure (if you want to approach BVcbo) that
the base bias voltage is pretty stiff (low-Z) because any
resistance at all can make the upper transistor act quasi-
inductive and make for oscillation which, if large enough,
might take you further toward upper or lower breakdown
than you plan.

It is not only a matter of high impedance (for the lower
device) but potentially asymmetric impedance - if a
simple current mirror, these often lack much sink
capability, only the sum of attached base currents,
and in this case the sensible rating would be BVceo
or lower (leave room for temp rise and scatter). An
emitter ballast scheme would probably be a good
idea for anything other than a Class A common
emitter gain stage.

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