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Calibre DRC/LVS error files

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Nourane Gamal

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I have some DRC errors i can not understand. I was told there are some files that contain an explanation of each DRC/LVS error. could anyone help me know where to find them or how to interpret the errors? the technology i am using is TSMC13rf

Example: OD.DN.3 { @ {OD OR DOD} density across full chip (minimum) >= 25%
DENSITY ALL_OD < 0.25 PRINT OD_DN_3.density
}
 

That's not an error, that's a design rule check. If the check catches anything, the report will show the text after the @. (The syntax is documented in the Calibre Verification User's Manual, part of the Calibre documentation.) Based on the text the rule check is that the OD or DOD layer has a density across the full chip of at least 25%.

The actual operations inside rely on some layers - are those layers defined in your set up? They might be derived layers - you'll need to look at the SVRF as compiled (that is, with #IFDEF INCLUDEs resolved) to be sure.
 

You can find it in your run directory, with file name look like: OD.DN.3.density
 

OD.DN.3 violation, as it says it is a density violation in OD layer. This violation will pop up if you have not inserted Front End dummy patterns. Or check whether you have blocked the regions for dummy patterns.
 

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