# How to calculate the Switching losses for MOSFET and Diode?

1. ## How to calculate the Switching losses for MOSFET and Diode?

Hello,

For MOSFET Switching losses:

How to calculate the MOSFET Switching Losses, If they are not given the Ton and Toff time in the datasheet? Is they any another formula?

Pswi = Vds x Id x Fsw x ((Ton x Toff)/2)

For Diode Switching losses:

How to calculate the Diode Switching Losses, If they are not given the Qrrd in the datasheet? Is they any another formula?

Pswi = Qrrd x Vrrm x Fswi

•

2. ## Re: How to calculate the Switching losses for MOSFET and Diode?

Is they any another formula?
You should give more information, such as the circuit where is applied, load and conduction type in order to consider the characteristic waveform. Anyway, you could see that for more details https://www.edaboard.com/thread58898.html#post263810

•

3. ## Re: How to calculate the Switching losses for MOSFET and Diode?

I had seen the link which you provided. But, I have one doubt, the formula Voff is need to be consider as a peak voltage or Vrms voltage.

•

4. ## Re: How to calculate the Switching losses for MOSFET and Diode?

any calculation of fet switching losses will be subject to considerable error. There are a huge number of factors involved.
The following by Balogh though, summarises the process of calculation.

As you can see from Balogh document, there is a turn-on switching loss associated with the gate voltage rising from Vth to Vgs(miller)…this switching loss is often ignored.
There is then, also at turn-on, a switching loss associated with the discharge of the gate-drain capacitance. –this is commonly known as the miller region, and is the one that most people take account of.

You have to work out, using I=cdv/dt, how long these capacitances will take to charge, and then do the Vit calculation to get the energy, then add up all the energies to get the total energy, and divide by time to get power dissipation.

The charging from vth to vgs(miller) involves the gate source capacitance in parallel with the gate-drain capacitance, but the charging of the Cgd capacitance involves exactly that. To make it more complicated, the Cgd varies wildly with voltage.....so during the "t2" region (page 9 of document), the Cgd capacitance is quite insignificant, as Cgd then has high voltage across it and so Cgd is small.

--[[ ]]--