Vhdl code fr matrix inverse

1. Vhdl code fr matrix inverse

Hi
I tried matrix inverse code...First i wrote package for finding determinant...then i wrote package for adjoint matrix. In vhdl module i have use both packages....Whether this approach is correct or not..? please help me.. •

2. Re: Vhdl code fr matrix inverse

If you wrote the code in a package, then it's probably not the correct approach.
Post the code with the problems you are having...

1 members found this post helpful. •

3. Re: Vhdl code fr matrix inverse Originally Posted by TrickyDicky If you wrote the code in a package, then it's probably not the correct approach.
Post the code with the problems you are having...
Than

package for determinant
 Code VHDL - [expand] 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 library IEEE; use IEEE.STD_LOGIC_1164.all; use ieee.numeric_std.all; package mat is type t11 is array (0 to 2) of unsigned(3 downto 0); type t1 is array (0 to 2) of t11; --3*3 matrix type integer is range 0 to 256 ; function dd (a:t1) return integer; end mat ;   package body mat is function dd (a:t1) return integer is variable i:integer:=0; variable det : integer range 0 to 256 := 0; begin for i in 0 to 2 loop det := det +( a(0)(i) * ((a (1)((i+1)%3) * (a (2)((i+2)%3))) - (a (1)((i+2)%3)* (a (2)((i+1)%3)))); end loop; return det; end  dd; end mat;

package for adjoint matrix
 Code VHDL - [expand] 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 library IEEE; use IEEE.STD_LOGIC_1164.all; use ieee.numeric_std.all;   package inverse is type t22 is array (0 to 2)of unsigned (3 downto 0); type t2 is array (0 to 2) of t22; type t33 is array (0 to 2)of unsigned (3 downto 0); type t3 is array (0 to 2) of t33;   function ad (b : t2) return t3;   end inverse;   package body inverse is function ad (b: t2) return t3 is variable i,j:integer :=0; variable ain:t3 :=(others => (others => (others => '0'))); begin for i in 0 to 2 loop for j in 0 to 2 loop ain(i)(j) :=( b((i+1)%3)((j+1)%3)*b((i+1)%3)((j+2)%3)) - (b((i+1)%3)((j+2)%3)* b((i+2)%3)((j+1)%3)); return ain; end ad; end inverse;

Module
 Code VHDL - [expand] 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 library IEEE; use IEEE.STD_LOGIC_1164.ALL; use.work.mat.all use.work.inve.all use IEEE.NUMERIC_STD.ALL; type t44 is array (0 to 2) of unsigned (3 downto 0); type t4 is array (0 to 2) of t44 ;   entity ddd is port(clk:in std_logic; a:in t1; a1:in t2; det:out std_logic; ainverse:out t3; final:out t4); end ddd;   architecture Behavioral of ddd is begin process(clk) begin if(clk'event and clk='1') then det<=dd(a); --function is called here.   ainverse<=adjoint(a1); end if; end process; end Behavioral;

error in package determinant
ERROR:HDLCompiler:806 - "C:\.Xilinx\god\matt.vhd" Line 37: Syntax error near ""3) * (a (2)((i+2)"".
ERROR:HDLCompiler:854 - "C:\.Xilinx\god\matt.vhd" Line 31: Unit <mat> ignored due to previous errors.
Is this correct ??? •

4. Re: Vhdl code fr matrix inverse

There is no such thing as a % operator in VHDL.

Verilog % is VHDL mod operator.

Here is a list of VHDL operators.

Besides that the error you are showing doesn't match any line numbers in your code. Next time post the exact error like you did, but also make sure they match the line numbers of the posted code or make sure you point out which error is on what line in the posted code.

Also Tricky is right this is the wrong way to do this. Think about the amount of logic that is generated in the functions, with for loops that are unrolled into parallel circuits. Don't expect VHDL to be software just because you use a text editor to enter the code. VHDL is a hardware description language, it describes a hardware circuit not a software program.

1 members found this post helpful. 5. Re: Vhdl code fr matrix inverse

Thank you for ur response...I'll go through that operators....how to approch a matrix inversion in vhdl...? Is there any other method to do matrix inverse •

6. Re: Vhdl code fr matrix inverse

You need to find a good textbook about digital logic. You code as a software programmer. You need to learn how digital logic works.. The best way would be to draw the circuit before you try and write any more vhdl code

1 members found this post helpful. 7. Re: Vhdl code fr matrix inverse

You design this as a FSM that addresses a memory (the matrix) and uses pipelined math operations. Writing the results into another memory (inverted matrix). This is all hardware circuits that aren't abstracted like a software matrix inversion program would be.

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