+ Post New Thread
Results 1 to 4 of 4
  1. #1
    Newbie level 5
    Points: 525, Level: 4

    Join Date
    Jul 2015
    Posts
    10
    Helped
    0 / 0
    Points
    525
    Level
    4

    [Moved] analog layout ( capacitor).

    In 110nm tech while running drc
    for capacitor i am getting this error
    how can i rectify this



    "in n_well , poly 1 overlap n+ diffusion is not allow".

    •   AltAdvertisement

        
       

  2. #2
    Super Moderator
    Points: 51,886, Level: 55
    Achievements:
    7 years registered
    erikl's Avatar
    Join Date
    Sep 2008
    Location
    Germany
    Posts
    8,091
    Helped
    2667 / 2667
    Points
    51,886
    Level
    55

    Re: [Moved] analog layout ( capacitor).

    Isn't the DRC error message clear enough?



    •   AltAdvertisement

        
       

  3. #3
    Newbie level 1
    Points: 259, Level: 3

    Join Date
    Nov 2014
    Location
    BANGALORE
    Posts
    1
    Helped
    0 / 0
    Points
    259
    Level
    3

    Re: [Moved] analog layout ( capacitor).

    Hi,

    Don not try to create nmos in nwell by puuting poly cap(you might be using..i feel),put outside nwell...correct me if i am wrong...



    •   AltAdvertisement

        
       

  4. #4
    Newbie level 5
    Points: 525, Level: 4

    Join Date
    Jul 2015
    Posts
    10
    Helped
    0 / 0
    Points
    525
    Level
    4

    Re: [Moved] analog layout ( capacitor).

    thank u every one for responce
    the cells which i got from foundry error pron in that cells



--[[ ]]--