Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

ADC program in Quartus II software

Status
Not open for further replies.

shom_show

Member level 1
Joined
Feb 28, 2012
Messages
41
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,286
Activity points
1,621
Can anyone please hep me out with ADC program in Block Diagram in Quartus II software. Also I am facing difficulty in converting VHDL code to Schematic. Any suggestions will be great help to me.

............
Sumanta Kumar Show
Research Scholar
E&E Dept.
NITK Surathkal
Karnataka, India
 

Not sure waht you mean with "adc program". Building an ADC requires specific analog hardware external to the FPGA. Or are you dealing with a MAX10 device which exposes a built-in FPGA?

Regarding schematic entry, Quartus doesn't offer an option to convert HDL to schematics, except for the RTL netlist viewer which gives a kind of schematic representation of your logic circuit. But schematic entry has to be drawn manually.

Most users of programmable logic proceed from schematic to HDL entry after a few projects, you'll need HDL anyway to describe blocks of complex logic that can't be well described by schematics.
 

Quartus only allows you to create a block for a given peice of RTL code - ie. you can place the block into another schematic file. You cannot convert the VHDL itself to schematics.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top