arunragavan
Advanced Member level 1
Can anyone gimme an idea of implementing sum of squares of arithmetic on FPGA.. a verilog or VHDL codin wud be really useful
with regards,
with regards,
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module top (clk, sum);
input clk;
reg [15:0] count = 0;
output reg [31:0] sum = 0;
always @ (posedge clk) begin
count <= count + 1;
sum <= sum + count * count;
end
endmodule
echo47 said:Here is a Verilog module that continuously counts, squares the count value, and accumulates the squares.
Code:module top (clk, sum); input clk; reg [15:0] count = 0; output reg [31:0] sum = 0; always @ (posedge clk) begin count <= count + 1; sum <= sum + count * count; end endmodule