Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

CMOS noise model in saturation and linear region

Status
Not open for further replies.

wccheng

Full Member level 5
Joined
May 16, 2004
Messages
287
Helped
1
Reputation
2
Reaction score
0
Trophy points
1,296
Activity points
2,710
Dear all,

I know there are shot noise, thermal noise and 1/f noise in the CMOS transistor. CMOS has the saturation and linear region. Is the noise model same in these two regions? Or the noise model is available in the saturation region only?

Best Regards,

wccheng
 

Re: CMOS noise model.

Frankly, the noises are due to the problems in processing, which are more physical. The regions Saturation and Linear are electrical. The reason why we are concerned in saturation is because it is where you do the signal processing. In digital circuits, the device noise is not really predominant. Hence we do not bother there.
 

Re: CMOS noise model.

Most fets have processing "problems". Problems involve things like crystaline structure defects at interfaces. These defects cause traps, where carriers can be "hung up" for a while, and released randomly in time, causing noise. Whenever you run such a device into saturation, where the fields are wildly changing at these interfaces, you end up with the most shot noise. So I would expect a cmos device to be much noisier in saturation.

As far as digital noise, yeah. If you are concerned about timing jitter on an OC-12 link, it is a big deal.
 

Re: CMOS noise model.

One must remember that :

Shot noise is due to the crossing of the Junction of holes/electrons in a random manner. When they cross the junction with some junction potential ψ, they reach the other side to become the minority carriers. Hence their motion is actually random when we assume it to be continous.

Thermal noise is due to the thermal velocity of carriers. The thermal velocities are more than the drift velocities. Hence they cause a noise due to it which depends on temperature

Flicker noise is due to the fact that some carriers are trapped in the Si - SiO2 interface and are rapidly changing their states.

From the above things, we should note that there is no mention of the region of operation. But mostly in saturation, the fields are high and will cause much worser noise conditions.
 

CMOS noise model.

Is there any nice book for this topic?
 

Re: CMOS noise model.

also try Behzad Razavi's CMOS analog integrated circuits
 

Re: CMOS noise model.

In saturation region MOS transistors has very large noise ,but in linear region when we use transisto as a switch we can obtain low noise
 

Re: CMOS noise model.

Check this document, talks about types of noise.
Regards.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top