FPGA ethernet beginner

Hello,

I have not used FPGA before and I have not used ethernet on FPGA. the goal is to build a high speed ethernet using FPGA.

I need some helpful resources to understand what all the above means and more topics like which to choose: MII/RMII/GMII/SMII?

Is there a book that explains these topics?

Do you have any experience designing in Verilog or VHDL ?

The best source of information, is the documentation for that particular FPGA. In the respective websites it is available for free. Else you may also see what you have under the 'Help' available in the GUI.
Please read the documentation carefully. Believe me, that docu has more info that anywhere else!

shaiko said:

Do you have any experience designing in Verilog or VHDL ?

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just minimal experience. but enough to do a small project.

i have never programmed/configured an FPGA

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dpaul said:

The best source of information, is the documentation for that particular FPGA. In the respective websites it is available for free. Else you may also see what you have under the 'Help' available in the GUI.
Please read the documentation carefully. Believe me, that docu has more info that anywhere else!

Click to expand...

I checked the datasheet. I want a textbook or website with information how to choose between ethernet IP cores, which interface type (MII/RMII/...?)

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I'm using the Artix 7 FPGA. if this information helps.

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http://www.xilinx.com/support/documentation/boards_and_kits/ac701/ug952-ac701-a7-eval-bd.pdf

The above link is the user guide pdf of the Artix 7 Evaluation board. They mentioned that "The board supports RGMII mode only." on page 38.

Is that for the entire Artix-7 FPGAs? if this can be configured, how did they do that? that is, how can I modify it to MII ?

Another question is why did they choose RGMII? why would anyone choose other MII variations?

Just a warning, as quoted from the xilinx Ethernet MAC core user guide:

Although the TEMAC solution is fully-verified, the challenge associated with
implementing a complete design varies depending on the configuration and functionality
of the application. For best results, previous experience building high performance,
pipelined FPGA designs using Xilinx implementation software and User Constraint Files
(UCF) is recommended. Contact your local Xilinx representative for a closer review and
estimation for your specific requirements.

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So as a beginner, this probably isnt a good project to start with.

https://www.xilinx.com/support/documentation/ip_documentation/tri_mode_eth_mac_ug138.pdf