Connet ADC output to UART Transmitter and display at hyperterminal(FPGA Verilog)

[darklumi92]

Hello everyone, right now i have the ADC module (12-bits) which i convert it to BCD and then ASCII number since hyperterminal understand ASCII code. For UART TX module, i use the one in http://www.fpga4fun.com/SerialInterface.html and it works but hyperterminal output multiple times like this http://i.imgur.com/0hNdz7v.jpg. I believe some control logic is required here. Anyone can provide idea of "control module" connecting ADC output to UART TX input so i can display the ADC in hyperterminal??

[FvM]

An output line must be terminated with carriage return + linefeed. (0x13 + 0x10).