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Short-length channel effects

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In today's short-length channel technologies (sub 22 nm), which effect is more important channel length modulation or velocity saturation? and, what is the most important effect of the secondary effects?
 

I think this cannot simply be differentiated, because both effects (and hot-electron effects, additionally) depend on external conditions: Vds, operation region (strong, light or no saturation), and operation mode (strong, moderate or weak inversion) with different dependencies.

I'd suggest to study these different effects and their dependencies in the literature, e.g. Binkley Tradeoffs and Optimization in Analog CMOS Design, chap. 3.8.4.1 - 3.8.4.3 . Then you can decide upon the predominance of one of these gds affecting effects for selected operation conditions, and for a special process size.
 

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For nanometer processess the situation is more complicated and a differences between CMOS, triple-gate, SOI, finfets technologies exists.

But, since 45nm not only typical CVS and vertical field effects are important, but contacts resistance, bias temperature instability, hot carrier injection and time dependent dielectric breakdown became more dominant.

The last three topics are not bad described by Maricau here.

Some usefull informations You can found also here: paper1, **broken link removed**
 

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Yes, I think it is quite depends on your design and application. There is not a general answer available.
 

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