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Dose any FPGA support reconfiguration?

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davyzhu

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I found reconfigurable device is a hot research region, does any FPGA nowadays support reconfiguration? I heard that Atmel has a chip can do that work.

Thanks!

davy
 

Xil!nx used to make one - "like XC6216" - in the past but no more now and I don't know why ??
 

davyzhu said:
I found reconfigurable device is a hot research region, does any FPGA nowadays support reconfiguration? I heard that Atmel has a chip can do that work.

Thanks!

davy


I wonder what you really wanted to ask. All SRAM based FPGAs are reconfigurable.... if u meant to ask dynamic/on the fly reconfiguration .. i guess that is also possible with todays fpgas..
 

yes any FPGA which has SRAM is surely re-configurable. I am sure FPGAs which are marketed nowa days are really re congurable. Xilinx XC series is sure re config. and dependin on wot sort of application u want to implement ur design, u can choose which FPGA u want to re config.


with regards,
 

There are a few one time programmable devices out there, which mainly focus on markets where the flaws of SRAM based devices are not acceptable (high power usage, soft errors,...) but these devises are much lower density then those of the "big ones", ALtera and Xilinx.
 

I wonder what you really wanted to ask. All SRAM based FPGAs are reconfigurable.... if u meant to ask dynamic/on the fly reconfiguration .. i guess that is also possible with todays fpgas..

Would you give me some reference on the dynamic reconfigurfation?
cn
 

ydao,
read from this link please
**broken link removed**
 

Some FPGA, which use anti-fuse, and not re-configurable.

The big marketing hype about those is mainly that when you power-on the FPGA, it is ready to use. This may be critical in some applications, where configuration time of an SRAM-based FPGA is unacceptable.
 

davyzhu said:
I found reconfigurable device is a hot research region, does any FPGA nowadays support reconfiguration? I heard that Atmel has a chip can do that work.

Thanks!

davy

Xilinx Vertex series is capable of doin dynamic reconfiguration. I myself am tryin to implement the DCT algorithm on it. I think if u are for dynamic reconfiguration(thou strictlky not invented) or for active or passive partial reconfiguration, then rhis would be one of the best choices for sure.. coz.. they ahve 50% utilisation of the device for memory and the architectire is very fine.! :)


/cedance
 

There is an OPENCORES.org project .. that allows to boot a FPGA from a SDM/MMC card .. it will be great to use it to boot different CONFIGURATIONS!!
 

Xilinx Virtex and posterior families are dinamically reconfigurable, you can find appnotes in xilinx.com, and the last ISE versions allow to make partial reconfiguration.

Added after 1 minutes:

Also Xilinx provide JBits, a java library to make dynamic reconfiguration by software from a PC local or remote.
 

All FPGA's are reconfigurable with the exception of fused typed such as those from Actel.
 

what does dynamic/on the fly reconfiguration for FPGAs mean???
 

For large SRAM-based FPGA devices, dynamic reconfiguration usually implies the partial reconfigurability of the device.
For instance, Altera FPGAs are SRAM-based chips and reconfigurable during application run-time, but they are not partially reconfigurable. Flash-based FPGAs are also reconfigurable, but they are too slow for rewriting new configuration data.

In contrast, Xilinx FPGAs are partially and run-time reconfigurable. Xilinx provides support for this feature -> Xilinx modular design flow for partial reconfiguration (see XAPP290). Alternatively, you can use JBits, but it has many limitations and is a bit out of date now.

Like Xilinx FPGAs, Atmel AT40K and AT94K devices do support partial and run-time reconfiguration (-> dynamic reconfiguration). But, I think Atmel do not provide sufficient support for this feature. In addition, the devices have a relatively low logic capacity (less than ~40K gates).
 

Does ALTERA devices support run-time reconfiguration.......Is it possible to find reconfiguration time manually???Please reply
 

Altera has recently answered the question in the support knowledge database:
Do Altera FPGA devices support partial reconfiguration?
No, Altera® FPGA devices do not support partial device reconfiguration of the SRAM array (CRAM). The FPGA architecture does not have the ability to reconfigure a certain portion of the configuration memory in the FPGA while not disrupting the device operation in user mode.

When pulsing nCONFIG to start the device reconfiguration, the entire device will be erased and reconfigured with the new configuration data.

Some device families support reconfiguration of specific features, such as PLL and transceiver reconfiguration. These options are described in the respective device handbook.
The configuration bitstream size for Altera FPGA is documented in the device datasheets, also the maximum configuration clock rate, so you are able to calculate configuration times.
 

If somebody is working now on Partial Reconfiguration of FPGAs (esp. Virtex series), then which version of Xilinx ISE and PlanAhead are you using?.

Thank u!
 

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