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CMOS reference circuits for high frequency circuits

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analogdesigncdac

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Hai

What are the issues that we must take into consideration in designing reference circuits(voltage and current) for high frequency circuits

thank you
 

One thing you should consider is noise coupling through the supply and substrate:

For circuit design, make sure the references has enough power supply rejection at those high frequencies. Consider the noise that comes from sharing the same supply (vdd and ground) for both types of circuits. If the high speed circuit pulls current quickly, bondwires inductances can create noise on the supply. Consider adding a lot of capacitance, design for power supply rejection and/or having separates pins for the supplies.

On the layout, make sure both circuits are as far as possible and that you have guard rings around each other to collect carriers that escaped to the substrate.
 
Hai

Thanks for your reply in the earlier post. I had one more query.
In 65nm technology if we have to design current references(4mA to 10mA)
what type of circuit we have to choose either a simple betamultipler or a PTAT from a BANDGAP reference.

Thank you
satya
 

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