How SoC FPGA works ?

Hello All

I recently knew about the concept of SoC FPGA. Now I understand that in regular FPGA you build your system using an HDL code or some advanced tools like QSys in Altera and then your design is synthesized directly to the FPGA fabric. Back to SoC FPGA, How exactly does it work ? what is the purpose of a processor core next to the FPGA chip or how would the implementation differs from a regular FPGA ?

Thanks folks!.

The implementation differs in so far that you have two design parts, a FPGA (HDL) and a processor (C-code) part. Both parts must be compiled and loaded to the SoC FPGA.

The Soc FPGA can replace designs that used separate FPGA and processor, achieving a very fast data transfer between both programmable parts. You'll find many interesting SoC applications on the FPGA vendor web sites.

CPE Abdalla said:

Hello All

I recently knew about the concept of SoC FPGA. Now I understand that in regular FPGA you build your system using an HDL code or some advanced tools like QSys in Altera and then your design is synthesized directly to the FPGA fabric. Back to SoC FPGA, How exactly does it work ? what is the purpose of a processor core next to the FPGA chip or how would the implementation differs from a regular FPGA ?

Thanks folks!.

Click to expand...

First you need a basic idea of how systems are typically designed. Many systems require a processor to implement the top level functionality and provide the external interfaces. For those systems where the processor can't implement all of the functionality to meet the performance requirements, you would add an FPGA to pick up that functionality. There are then functions that can't be implemented inside an FPGA either which would then be implemented with other discrete parts outside of the FPGA (for example, A/D converters, motor drivers, etc.).

Given that background, if you had a part that combines the processor and an FPGA that might be of benefit to some types of products. That type of part is called an 'SOC FPGA'. The design flow is similar to a standalone processor and a standalone FPGA in that there is someone writing HDL for the 'FPGA' portion and someone writing C code for the processor. Those two outputs though then are combined to produce a bitstream that can then be downloaded into the 'SOC FPGA' part to have it implement both.

Kevin Jennings

So can I say that depending on my design I might need only an FPGA or only the processor or both ?
And briefly what about the interface between them ? How it is implemented ?

CPE Abdalla said:

So can I say that depending on my design I might need only an FPGA or only the processor or both ?

Click to expand...

Yes to all three.

And briefly what about the interface between them ? How it is implemented ?

Click to expand...

Xilinx - AXI
Altera - Avalon

CPE Abdalla said:

So can I say that depending on my design I might need only an FPGA or only the processor or both ?

Click to expand...

And briefly what about the interface between them ? How it is implemented ?

Click to expand...

Typically, a processor (I'm assuming you mean an external processor) will have a parallel 'memory' interface that can be used, the FPGA would then decode a certain address range to allow the processor access to the FPGA registers. Processors can also have a whole host of other interfaces that could (and many times are) used. Details of those interfaces would be defined by the datasheet of the particular processor.

For an internal to the device interface between the processor and 'FPGA' within an 'SOC FPGA', you would typically go with the interface specified by the FPGA supplier. For Altera, that interface is Avalon. Other devices have different interfaces.

Kevin Jennings

ads-ee said:

Yes to all three.



Xilinx - AXI
Altera - Avalon

Click to expand...

Altera also uses AXI for its ARM SOCs, but you need to put AXI-Avalon bridges for any existing IP until they update it all.

But Avalon is very similar to AXI.