gtaice
Newbie level 2
Hello
I'm working with the BSIM-CMG (version 108) from Berkelery university using the PTM modelcards from ASU to simulate multigate transistors and I have a couple questions that probably somebody have come across.
First, in the BSIM-CMG model there is a parameter called GEOMOD, which allows to select double, triple(FinFET) an quadruple gates. So my understanding is that to change from one geometry to another we only have to modify this parameter. Is that correct?
Another question is that I am simulating a chain of ripple carry adders using these transistors for 8bit adders. First, I have simulated the 1bit adders and everything is working OK.
Then I add ten .alter statements including different vectors with 50 transitions in each of them to obtain a good amount of samples. The problem is that if I do individual simulations of each vector the results are different than if I just run the entire netlist. How can I avoid the interaction between .alter statements?
I am running multithread hspice -hpp -mt 16 netlist.sp
Does this have any influence?
Finally I am having some problems measuring the dynamic power for 8bit carry chain (I am using two types of full adders, the 28T and another one using only 10T, which operates with voltage drops). As I stated the 1bit adders are working properly but when I increase the size of the chain the measured power is around 10^-2 or even 2W for the 10T adder. I have no clue where this can come from because it doesn't seem a convergence problem because hspice gives a solution.
Any help will be most welcomed
I include one of the netlists that I use to simulate 1bit adder
I'm working with the BSIM-CMG (version 108) from Berkelery university using the PTM modelcards from ASU to simulate multigate transistors and I have a couple questions that probably somebody have come across.
First, in the BSIM-CMG model there is a parameter called GEOMOD, which allows to select double, triple(FinFET) an quadruple gates. So my understanding is that to change from one geometry to another we only have to modify this parameter. Is that correct?
Another question is that I am simulating a chain of ripple carry adders using these transistors for 8bit adders. First, I have simulated the 1bit adders and everything is working OK.
Then I add ten .alter statements including different vectors with 50 transitions in each of them to obtain a good amount of samples. The problem is that if I do individual simulations of each vector the results are different than if I just run the entire netlist. How can I avoid the interaction between .alter statements?
I am running multithread hspice -hpp -mt 16 netlist.sp
Does this have any influence?
Finally I am having some problems measuring the dynamic power for 8bit carry chain (I am using two types of full adders, the 28T and another one using only 10T, which operates with voltage drops). As I stated the 1bit adders are working properly but when I increase the size of the chain the measured power is around 10^-2 or even 2W for the 10T adder. I have no clue where this can come from because it doesn't seem a convergence problem because hspice gives a solution.
Any help will be most welcomed
I include one of the netlists that I use to simulate 1bit adder
Code dot - [expand]