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31st October 2014, 03:59 #1
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On DNL/INL with reduced bits
Hi, guys
If I only use the MSB K bits of a nominal N bits ADC (N>K), what's the relationship between the MSB K bits DNL/INL and N bits DNL/INL.
To give the question more apprehensible, assume the max DNLs/INLs for the MSB K bit and the nominal N bits are/, and / separately.
Can we have the following conclusions
Or there exists other statistical relationships
Thank You!

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31st October 2014, 17:58 #2
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Re: On DNL/INL with reduced bits
No, I don't think this will work, sorry: a reasonably good ADC shouldn't have DNL, even INLvalues greater than a few single bits (at least for N≦12), generally I'd estimate less than 2^{N7}.. 2^{N8} bits, see e.g. here for a 10bit converter:
.
That means if you measure the DNL/INL values on the MSB K=8 for this N=10 bit converter, you'd get zero values as results.

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3rd November 2014, 03:34 #3
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Re: On DNL/INL with reduced bits
Yeah, I understand what you mean in your case.
Let's now think about a bad case, where an 10bit ADC has 16LSB maximum DNL and 32LSB maximun INL. What if we only use the MSB 9bit to calculate DNL & INL, can we obtain 8LSB maximun DNL and 16LSB maximum INL for MSB9 bit data.

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3rd November 2014, 17:20 #4

6th November 2014, 04:01 #5
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Re: On DNL/INL with reduced bits
It only a theoretical discussion, not a real case.
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